200 lines
7.3 KiB
Tcl
200 lines
7.3 KiB
Tcl
# TCL File Generated by Component Editor 18.1
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# Wed Jan 06 17:21:08 CET 2021
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# DO NOT MODIFY
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#
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# LCDController "LCDController" v1.0
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# 2021.01.06.17:21:08
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#
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#
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#
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# request TCL package from ACDS 16.1
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#
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package require -exact qsys 16.1
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#
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# module LCDController
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#
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set_module_property DESCRIPTION ""
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set_module_property NAME LCDController
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set_module_property VERSION 1.0
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set_module_property INTERNAL false
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set_module_property OPAQUE_ADDRESS_MAP true
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set_module_property AUTHOR ""
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set_module_property DISPLAY_NAME LCDController
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set_module_property INSTANTIATE_IN_SYSTEM_MODULE true
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set_module_property EDITABLE true
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set_module_property REPORT_TO_TALKBACK false
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set_module_property ALLOW_GREYBOX_GENERATION false
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set_module_property REPORT_HIERARCHY false
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#
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# file sets
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#
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add_fileset QUARTUS_SYNTH QUARTUS_SYNTH "" ""
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set_fileset_property QUARTUS_SYNTH TOP_LEVEL LCDController
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set_fileset_property QUARTUS_SYNTH ENABLE_RELATIVE_INCLUDE_PATHS false
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set_fileset_property QUARTUS_SYNTH ENABLE_FILE_OVERWRITE_MODE false
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add_fileset_file LCDController.vhd VHDL PATH LCDController.vhd TOP_LEVEL_FILE
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add_fileset_file ClkGen.vhd VHDL PATH ClkGen.vhd
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add_fileset_file LCDAvalonMaster.vhd VHDL PATH LCDAvalonMaster.vhd
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add_fileset_file LCDDriver.vhd VHDL PATH LCDDriver.vhd
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add_fileset_file PixTrans.vhd VHDL PATH PixTrans.vhd
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#
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# parameters
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#
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#
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# display items
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#
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#
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# connection point avalon_slave
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#
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add_interface avalon_slave avalon end
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set_interface_property avalon_slave addressUnits WORDS
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set_interface_property avalon_slave associatedClock clock_sink
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set_interface_property avalon_slave associatedReset reset_sink
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set_interface_property avalon_slave bitsPerSymbol 8
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set_interface_property avalon_slave burstOnBurstBoundariesOnly false
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set_interface_property avalon_slave burstcountUnits WORDS
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set_interface_property avalon_slave explicitAddressSpan 0
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set_interface_property avalon_slave holdTime 0
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set_interface_property avalon_slave linewrapBursts false
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set_interface_property avalon_slave maximumPendingReadTransactions 0
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set_interface_property avalon_slave maximumPendingWriteTransactions 0
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set_interface_property avalon_slave readLatency 0
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set_interface_property avalon_slave readWaitStates 0
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set_interface_property avalon_slave readWaitTime 0
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set_interface_property avalon_slave setupTime 0
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set_interface_property avalon_slave timingUnits Cycles
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set_interface_property avalon_slave writeWaitTime 0
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set_interface_property avalon_slave ENABLED true
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set_interface_property avalon_slave EXPORT_OF ""
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set_interface_property avalon_slave PORT_NAME_MAP ""
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set_interface_property avalon_slave CMSIS_SVD_VARIABLES ""
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set_interface_property avalon_slave SVD_ADDRESS_GROUP ""
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add_interface_port avalon_slave avalon_slave_address address Input 4
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add_interface_port avalon_slave avalon_slave_write write Input 1
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add_interface_port avalon_slave avalon_slave_writedata writedata Input 32
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add_interface_port avalon_slave avalon_slave_read read Input 1
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add_interface_port avalon_slave avalon_slave_readdata readdata Output 32
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add_interface_port avalon_slave avalon_slave_waitrequest waitrequest Output 1
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set_interface_assignment avalon_slave embeddedsw.configuration.isFlash 0
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set_interface_assignment avalon_slave embeddedsw.configuration.isMemoryDevice 0
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set_interface_assignment avalon_slave embeddedsw.configuration.isNonVolatileStorage 0
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set_interface_assignment avalon_slave embeddedsw.configuration.isPrintableDevice 0
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#
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# connection point clock_sink
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#
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add_interface clock_sink clock end
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set_interface_property clock_sink clockRate 0
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set_interface_property clock_sink ENABLED true
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set_interface_property clock_sink EXPORT_OF ""
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set_interface_property clock_sink PORT_NAME_MAP ""
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set_interface_property clock_sink CMSIS_SVD_VARIABLES ""
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set_interface_property clock_sink SVD_ADDRESS_GROUP ""
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add_interface_port clock_sink clk clk Input 1
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#
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# connection point reset_sink
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#
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add_interface reset_sink reset end
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set_interface_property reset_sink associatedClock clock_sink
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set_interface_property reset_sink synchronousEdges DEASSERT
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set_interface_property reset_sink ENABLED true
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set_interface_property reset_sink EXPORT_OF ""
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set_interface_property reset_sink PORT_NAME_MAP ""
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set_interface_property reset_sink CMSIS_SVD_VARIABLES ""
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set_interface_property reset_sink SVD_ADDRESS_GROUP ""
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add_interface_port reset_sink rst_n reset_n Input 1
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#
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# connection point avalon_master
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#
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add_interface avalon_master avalon start
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set_interface_property avalon_master addressUnits SYMBOLS
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set_interface_property avalon_master associatedClock clock_sink
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set_interface_property avalon_master associatedReset reset_sink
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set_interface_property avalon_master bitsPerSymbol 8
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set_interface_property avalon_master burstOnBurstBoundariesOnly false
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set_interface_property avalon_master burstcountUnits WORDS
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set_interface_property avalon_master doStreamReads false
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set_interface_property avalon_master doStreamWrites false
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set_interface_property avalon_master holdTime 0
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set_interface_property avalon_master linewrapBursts false
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set_interface_property avalon_master maximumPendingReadTransactions 0
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set_interface_property avalon_master maximumPendingWriteTransactions 0
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set_interface_property avalon_master readLatency 0
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set_interface_property avalon_master readWaitTime 1
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set_interface_property avalon_master setupTime 0
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set_interface_property avalon_master timingUnits Cycles
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set_interface_property avalon_master writeWaitTime 0
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set_interface_property avalon_master ENABLED true
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set_interface_property avalon_master EXPORT_OF ""
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set_interface_property avalon_master PORT_NAME_MAP ""
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set_interface_property avalon_master CMSIS_SVD_VARIABLES ""
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set_interface_property avalon_master SVD_ADDRESS_GROUP ""
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add_interface_port avalon_master avalon_master_address address Output 32
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add_interface_port avalon_master avalon_master_burstcount burstcount Output 5
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add_interface_port avalon_master avalon_master_read read Output 1
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add_interface_port avalon_master avalon_master_readdata readdata Input 32
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add_interface_port avalon_master avalon_master_readdatavalid readdatavalid Input 1
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add_interface_port avalon_master avalon_master_waitreq waitrequest Input 1
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#
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# connection point irq
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#
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add_interface irq interrupt end
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set_interface_property irq associatedAddressablePoint avalon_slave
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set_interface_property irq associatedClock clock_sink
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set_interface_property irq associatedReset reset_sink
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set_interface_property irq bridgedReceiverOffset ""
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set_interface_property irq bridgesToReceiver ""
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set_interface_property irq ENABLED true
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set_interface_property irq EXPORT_OF ""
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set_interface_property irq PORT_NAME_MAP ""
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set_interface_property irq CMSIS_SVD_VARIABLES ""
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set_interface_property irq SVD_ADDRESS_GROUP ""
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add_interface_port irq av_irq irq Output 1
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#
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# connection point LT24
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#
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add_interface LT24 conduit end
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set_interface_property LT24 associatedClock clock_sink
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set_interface_property LT24 associatedReset reset_sink
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set_interface_property LT24 ENABLED true
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set_interface_property LT24 EXPORT_OF ""
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set_interface_property LT24 PORT_NAME_MAP ""
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set_interface_property LT24 CMSIS_SVD_VARIABLES ""
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set_interface_property LT24 SVD_ADDRESS_GROUP ""
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add_interface_port LT24 lt24_cs_n cs_n Output 1
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add_interface_port LT24 lt24_data data Output 16
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add_interface_port LT24 lt24_lcd_on lcd_on Output 1
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add_interface_port LT24 lt24_rd_n rd_n Output 1
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add_interface_port LT24 lt24_reset_n reset_n Output 1
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add_interface_port LT24 lt24_rs rs Output 1
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add_interface_port LT24 lt24_wr_n wr_n Output 1
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