# TCL File Generated by Component Editor 18.1 # Wed Jan 06 17:21:08 CET 2021 # DO NOT MODIFY # # LCDController "LCDController" v1.0 # 2021.01.06.17:21:08 # # # # request TCL package from ACDS 16.1 # package require -exact qsys 16.1 # # module LCDController # set_module_property DESCRIPTION "" set_module_property NAME LCDController set_module_property VERSION 1.0 set_module_property INTERNAL false set_module_property OPAQUE_ADDRESS_MAP true set_module_property AUTHOR "" set_module_property DISPLAY_NAME LCDController set_module_property INSTANTIATE_IN_SYSTEM_MODULE true set_module_property EDITABLE true set_module_property REPORT_TO_TALKBACK false set_module_property ALLOW_GREYBOX_GENERATION false set_module_property REPORT_HIERARCHY false # # file sets # add_fileset QUARTUS_SYNTH QUARTUS_SYNTH "" "" set_fileset_property QUARTUS_SYNTH TOP_LEVEL LCDController set_fileset_property QUARTUS_SYNTH ENABLE_RELATIVE_INCLUDE_PATHS false set_fileset_property QUARTUS_SYNTH ENABLE_FILE_OVERWRITE_MODE false add_fileset_file LCDController.vhd VHDL PATH LCDController.vhd TOP_LEVEL_FILE add_fileset_file ClkGen.vhd VHDL PATH ClkGen.vhd add_fileset_file LCDAvalonMaster.vhd VHDL PATH LCDAvalonMaster.vhd add_fileset_file LCDDriver.vhd VHDL PATH LCDDriver.vhd add_fileset_file PixTrans.vhd VHDL PATH PixTrans.vhd # # parameters # # # display items # # # connection point avalon_slave # add_interface avalon_slave avalon end set_interface_property avalon_slave addressUnits WORDS set_interface_property avalon_slave associatedClock clock_sink set_interface_property avalon_slave associatedReset reset_sink set_interface_property avalon_slave bitsPerSymbol 8 set_interface_property avalon_slave burstOnBurstBoundariesOnly false set_interface_property avalon_slave burstcountUnits WORDS set_interface_property avalon_slave explicitAddressSpan 0 set_interface_property avalon_slave holdTime 0 set_interface_property avalon_slave linewrapBursts false set_interface_property avalon_slave maximumPendingReadTransactions 0 set_interface_property avalon_slave maximumPendingWriteTransactions 0 set_interface_property avalon_slave readLatency 0 set_interface_property avalon_slave readWaitStates 0 set_interface_property avalon_slave readWaitTime 0 set_interface_property avalon_slave setupTime 0 set_interface_property avalon_slave timingUnits Cycles set_interface_property avalon_slave writeWaitTime 0 set_interface_property avalon_slave ENABLED true set_interface_property avalon_slave EXPORT_OF "" set_interface_property avalon_slave PORT_NAME_MAP "" set_interface_property avalon_slave CMSIS_SVD_VARIABLES "" set_interface_property avalon_slave SVD_ADDRESS_GROUP "" add_interface_port avalon_slave avalon_slave_address address Input 4 add_interface_port avalon_slave avalon_slave_write write Input 1 add_interface_port avalon_slave avalon_slave_writedata writedata Input 32 add_interface_port avalon_slave avalon_slave_read read Input 1 add_interface_port avalon_slave avalon_slave_readdata readdata Output 32 add_interface_port avalon_slave avalon_slave_waitrequest waitrequest Output 1 set_interface_assignment avalon_slave embeddedsw.configuration.isFlash 0 set_interface_assignment avalon_slave embeddedsw.configuration.isMemoryDevice 0 set_interface_assignment avalon_slave embeddedsw.configuration.isNonVolatileStorage 0 set_interface_assignment avalon_slave embeddedsw.configuration.isPrintableDevice 0 # # connection point clock_sink # add_interface clock_sink clock end set_interface_property clock_sink clockRate 0 set_interface_property clock_sink ENABLED true set_interface_property clock_sink EXPORT_OF "" set_interface_property clock_sink PORT_NAME_MAP "" set_interface_property clock_sink CMSIS_SVD_VARIABLES "" set_interface_property clock_sink SVD_ADDRESS_GROUP "" add_interface_port clock_sink clk clk Input 1 # # connection point reset_sink # add_interface reset_sink reset end set_interface_property reset_sink associatedClock clock_sink set_interface_property reset_sink synchronousEdges DEASSERT set_interface_property reset_sink ENABLED true set_interface_property reset_sink EXPORT_OF "" set_interface_property reset_sink PORT_NAME_MAP "" set_interface_property reset_sink CMSIS_SVD_VARIABLES "" set_interface_property reset_sink SVD_ADDRESS_GROUP "" add_interface_port reset_sink rst_n reset_n Input 1 # # connection point avalon_master # add_interface avalon_master avalon start set_interface_property avalon_master addressUnits SYMBOLS set_interface_property avalon_master associatedClock clock_sink set_interface_property avalon_master associatedReset reset_sink set_interface_property avalon_master bitsPerSymbol 8 set_interface_property avalon_master burstOnBurstBoundariesOnly false set_interface_property avalon_master burstcountUnits WORDS set_interface_property avalon_master doStreamReads false set_interface_property avalon_master doStreamWrites false set_interface_property avalon_master holdTime 0 set_interface_property avalon_master linewrapBursts false set_interface_property avalon_master maximumPendingReadTransactions 0 set_interface_property avalon_master maximumPendingWriteTransactions 0 set_interface_property avalon_master readLatency 0 set_interface_property avalon_master readWaitTime 1 set_interface_property avalon_master setupTime 0 set_interface_property avalon_master timingUnits Cycles set_interface_property avalon_master writeWaitTime 0 set_interface_property avalon_master ENABLED true set_interface_property avalon_master EXPORT_OF "" set_interface_property avalon_master PORT_NAME_MAP "" set_interface_property avalon_master CMSIS_SVD_VARIABLES "" set_interface_property avalon_master SVD_ADDRESS_GROUP "" add_interface_port avalon_master avalon_master_address address Output 32 add_interface_port avalon_master avalon_master_burstcount burstcount Output 5 add_interface_port avalon_master avalon_master_read read Output 1 add_interface_port avalon_master avalon_master_readdata readdata Input 32 add_interface_port avalon_master avalon_master_readdatavalid readdatavalid Input 1 add_interface_port avalon_master avalon_master_waitreq waitrequest Input 1 # # connection point irq # add_interface irq interrupt end set_interface_property irq associatedAddressablePoint avalon_slave set_interface_property irq associatedClock clock_sink set_interface_property irq associatedReset reset_sink set_interface_property irq bridgedReceiverOffset "" set_interface_property irq bridgesToReceiver "" set_interface_property irq ENABLED true set_interface_property irq EXPORT_OF "" set_interface_property irq PORT_NAME_MAP "" set_interface_property irq CMSIS_SVD_VARIABLES "" set_interface_property irq SVD_ADDRESS_GROUP "" add_interface_port irq av_irq irq Output 1 # # connection point LT24 # add_interface LT24 conduit end set_interface_property LT24 associatedClock clock_sink set_interface_property LT24 associatedReset reset_sink set_interface_property LT24 ENABLED true set_interface_property LT24 EXPORT_OF "" set_interface_property LT24 PORT_NAME_MAP "" set_interface_property LT24 CMSIS_SVD_VARIABLES "" set_interface_property LT24 SVD_ADDRESS_GROUP "" add_interface_port LT24 lt24_cs_n cs_n Output 1 add_interface_port LT24 lt24_data data Output 16 add_interface_port LT24 lt24_lcd_on lcd_on Output 1 add_interface_port LT24 lt24_rd_n rd_n Output 1 add_interface_port LT24 lt24_reset_n reset_n Output 1 add_interface_port LT24 lt24_rs rs Output 1 add_interface_port LT24 lt24_wr_n wr_n Output 1