Disabled external gits

This commit is contained in:
2022-04-07 18:54:11 +02:00
parent 15e7120d6d
commit 0fb3e365d4
376 changed files with 50840 additions and 0 deletions

View File

@@ -0,0 +1,62 @@
<?xml version="1.0" encoding="UTF-8"?>
<library>
<!-- date: 2017.03.19.20:51:30 -->
<!-- generated by: ip-make-ipx -->
<!-- -->
<!-- 3 in ../../hdl/ -->
<!-- -->
<component
name="lepton"
file="../../hdl/lepton/hdl/lepton_hw.tcl"
displayName="lepton"
version="1.0"
description="IR Camera 80x60"
tags="AUTHORSHIP=Philemon Favrod &amp; Sahand Kashani-Akhavan /// CONNECTION_TYPES=avalon,clock,conduit,reset /// INTERNAL_COMPONENT=false"
categories="Camera"
factory="TclModuleFactory">
<tag2 key="ALLOW_GREYBOX_GENERATION" value="false" />
<tag2 key="COMPONENT_EDITABLE" value="true" />
<tag2 key="COMPONENT_HIDE_FROM_SOPC" value="true" />
<tag2 key="INSTANTIATE_IN_SYSTEM_MODULE" value="true" />
<tag2 key="OPAQUE_ADDRESS_MAP" value="true" />
<tag2 key="REPORT_HIERARCHY" value="false" />
<tag2 key="SUPPORTED_FILE_SETS" value="QUARTUS_SYNTH" />
<tag2 key="TCL_PACKAGE_VERSION" value="16.0" />
</component>
<component
name="mcp3204"
file="../../hdl/joysticks/hdl/mcp3204_hw.tcl"
displayName="mcp3204"
version="1.0"
description="4-Channel 12-Bit A/D Converter with SPI Serial Interface"
tags="AUTHORSHIP=Philemon Favrod &amp; Sahand Kashani-Akhavan /// CONNECTION_TYPES=avalon,clock,conduit,reset /// INTERNAL_COMPONENT=false"
categories="Joystick"
factory="TclModuleFactory">
<tag2 key="ALLOW_GREYBOX_GENERATION" value="false" />
<tag2 key="COMPONENT_EDITABLE" value="true" />
<tag2 key="COMPONENT_HIDE_FROM_SOPC" value="true" />
<tag2 key="INSTANTIATE_IN_SYSTEM_MODULE" value="true" />
<tag2 key="OPAQUE_ADDRESS_MAP" value="true" />
<tag2 key="REPORT_HIERARCHY" value="false" />
<tag2 key="SUPPORTED_FILE_SETS" value="QUARTUS_SYNTH" />
<tag2 key="TCL_PACKAGE_VERSION" value="16.0" />
</component>
<component
name="pwm"
file="../../hdl/pantilt/hdl/pwm_hw.tcl"
displayName="pwm"
version="1.0"
description="Pan-tilt"
tags="AUTHORSHIP= /// CONNECTION_TYPES=avalon,clock,conduit,reset /// INTERNAL_COMPONENT=false"
categories="Pan-tilt"
factory="TclModuleFactory">
<tag2 key="ALLOW_GREYBOX_GENERATION" value="false" />
<tag2 key="COMPONENT_EDITABLE" value="true" />
<tag2 key="COMPONENT_HIDE_FROM_SOPC" value="true" />
<tag2 key="INSTANTIATE_IN_SYSTEM_MODULE" value="true" />
<tag2 key="OPAQUE_ADDRESS_MAP" value="true" />
<tag2 key="REPORT_HIERARCHY" value="false" />
<tag2 key="SUPPORTED_FILE_SETS" value="QUARTUS_SYNTH" />
<tag2 key="TCL_PACKAGE_VERSION" value="16.0" />
</component>
</library>

View File

@@ -0,0 +1,31 @@
# -------------------------------------------------------------------------- #
#
# Copyright (C) 1991-2015 Altera Corporation. All rights reserved.
# Your use of Altera Corporation's design tools, logic functions
# and other software and tools, and its AMPP partner logic
# functions, and any output files from any of the foregoing
# (including device programming or simulation files), and any
# associated documentation or information are expressly subject
# to the terms and conditions of the Altera Program License
# Subscription Agreement, the Altera Quartus Prime License Agreement,
# the Altera MegaCore Function License Agreement, or other
# applicable license agreement, including, without limitation,
# that your use is for the sole purpose of programming logic
# devices manufactured by Altera and sold by Altera or its
# authorized distributors. Please refer to the applicable
# agreement for further details.
#
# -------------------------------------------------------------------------- #
#
# Quartus Prime
# Version 15.1.0 Build 185 10/21/2015 SJ Lite Edition
# Date created = 11:03:02 February 05, 2016
#
# -------------------------------------------------------------------------- #
QUARTUS_VERSION = "15.1"
DATE = "11:03:02 February 05, 2016"
# Revisions
PROJECT_REVISION = "lab_3_0"

View File

@@ -0,0 +1,811 @@
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 15.1.0
set_global_assignment -name LAST_QUARTUS_VERSION 16.0.0
set_global_assignment -name SMART_RECOMPILE OFF
set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
set_global_assignment -name TOP_LEVEL_ENTITY DE0_Nano_SoC_PrSoC_extn_board_top_level
set_global_assignment -name VHDL_FILE ../hdl/DE0_Nano_SoC_PrSoC_extn_board_top_level.vhd
set_global_assignment -name SDC_FILE lab_3_0.sdc
set_global_assignment -name FAMILY "Cyclone V"
set_global_assignment -name DEVICE 5CSEMA4U23C6
set_global_assignment -name DEVICE_FILTER_PACKAGE UFBGA
set_global_assignment -name DEVICE_FILTER_PIN_COUNT 896
set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 6
#============================================================
# ADC
#============================================================
set_location_assignment PIN_U9 -to ADC_CONVST
set_location_assignment PIN_V10 -to ADC_SCK
set_location_assignment PIN_AC4 -to ADC_SDI
set_location_assignment PIN_AD4 -to ADC_SDO
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ADC_CONVST
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ADC_SCK
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ADC_SDI
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ADC_SDO
#============================================================
# ARDUINO Extention OV7670 CAMERA
#============================================================
set_location_assignment PIN_AE15 -to CAM_D[0]
set_location_assignment PIN_AE15 -to CAM_D_0
set_location_assignment PIN_AF17 -to CAM_D[1]
set_location_assignment PIN_AF17 -to CAM_D_1
set_location_assignment PIN_AH8 -to CAM_D[2]
set_location_assignment PIN_AH8 -to CAM_D_2
set_location_assignment PIN_AG8 -to CAM_D[3]
set_location_assignment PIN_AG8 -to CAM_D_3
set_location_assignment PIN_U13 -to CAM_D[4]
set_location_assignment PIN_U13 -to CAM_D_4
set_location_assignment PIN_U14 -to CAM_D[5]
set_location_assignment PIN_U14 -to CAM_D_5
set_location_assignment PIN_AG9 -to CAM_D[6]
set_location_assignment PIN_AG9 -to CAM_D_6
set_location_assignment PIN_AG10 -to CAM_D[7]
set_location_assignment PIN_AG10 -to CAM_D_7
set_location_assignment PIN_AF13 -to CAM_D[8]
set_location_assignment PIN_AF13 -to CAM_D_8
set_location_assignment PIN_AG13 -to CAM_D[9]
set_location_assignment PIN_AG13 -to CAM_D_9
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to CAM_D[0]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to CAM_D_0
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to CAM_D[1]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to CAM_D_1
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to CAM_D[2]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to CAM_D_2
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to CAM_D[3]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to CAM_D_3
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to CAM_D[4]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to CAM_D_4
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to CAM_D[5]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to CAM_D_5
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to CAM_D[6]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to CAM_D_6
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to CAM_D[7]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to CAM_D_7
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to CAM_D[8]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to CAM_D_8
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to CAM_D[9]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to CAM_D_9
#============================================================
# Arduino Extension LEPTON CAMERA THERMAL CAM_TH
#============================================================
set_location_assignment PIN_AF15 -to CAM_TH_SPI_CS_N
set_location_assignment PIN_AG16 -to CAM_TH_MOSI
set_location_assignment PIN_AH11 -to CAM_TH_MISO
set_location_assignment PIN_AH12 -to CAM_TH_CLK
set_location_assignment PIN_AH9 -to CAM_TH_I2C_SDA
set_location_assignment PIN_AG11 -to CAM_TH_I2C_SCL
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to CAM_TH_SPI_CS_N
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to CAM_TH_MOSI
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to CAM_TH_MISO
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to CAM_TH_CLK
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to CAM_TH_I2C_SDA
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to CAM_TH_I2C_SCL
set_location_assignment PIN_AH7 -to ARDUINO_RESET_N
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to ARDUINO_RESET_N
#============================================================
# CLOCK
#============================================================
set_location_assignment PIN_V11 -to FPGA_CLK1_50
set_location_assignment PIN_Y13 -to FPGA_CLK2_50
set_location_assignment PIN_E11 -to FPGA_CLK3_50
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FPGA_CLK1_50
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FPGA_CLK2_50
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FPGA_CLK3_50
#============================================================
# HPS
#============================================================
set_location_assignment PIN_C6 -to HPS_CONV_USB_N
set_location_assignment PIN_C28 -to HPS_DDR3_ADDR[0]
set_location_assignment PIN_C28 -to HPS_DDR3_ADDR_0
set_location_assignment PIN_B28 -to HPS_DDR3_ADDR[1]
set_location_assignment PIN_B28 -to HPS_DDR3_ADDR_1
set_location_assignment PIN_E26 -to HPS_DDR3_ADDR[2]
set_location_assignment PIN_E26 -to HPS_DDR3_ADDR_2
set_location_assignment PIN_D26 -to HPS_DDR3_ADDR[3]
set_location_assignment PIN_D26 -to HPS_DDR3_ADDR_3
set_location_assignment PIN_J21 -to HPS_DDR3_ADDR[4]
set_location_assignment PIN_J21 -to HPS_DDR3_ADDR_4
set_location_assignment PIN_J20 -to HPS_DDR3_ADDR[5]
set_location_assignment PIN_J20 -to HPS_DDR3_ADDR_5
set_location_assignment PIN_C26 -to HPS_DDR3_ADDR[6]
set_location_assignment PIN_C26 -to HPS_DDR3_ADDR_6
set_location_assignment PIN_B26 -to HPS_DDR3_ADDR[7]
set_location_assignment PIN_B26 -to HPS_DDR3_ADDR_7
set_location_assignment PIN_F26 -to HPS_DDR3_ADDR[8]
set_location_assignment PIN_F26 -to HPS_DDR3_ADDR_8
set_location_assignment PIN_F25 -to HPS_DDR3_ADDR[9]
set_location_assignment PIN_F25 -to HPS_DDR3_ADDR_9
set_location_assignment PIN_A24 -to HPS_DDR3_ADDR[10]
set_location_assignment PIN_A24 -to HPS_DDR3_ADDR_10
set_location_assignment PIN_B24 -to HPS_DDR3_ADDR[11]
set_location_assignment PIN_B24 -to HPS_DDR3_ADDR_11
set_location_assignment PIN_D24 -to HPS_DDR3_ADDR[12]
set_location_assignment PIN_D24 -to HPS_DDR3_ADDR_12
set_location_assignment PIN_C24 -to HPS_DDR3_ADDR[13]
set_location_assignment PIN_C24 -to HPS_DDR3_ADDR_13
set_location_assignment PIN_G23 -to HPS_DDR3_ADDR[14]
set_location_assignment PIN_G23 -to HPS_DDR3_ADDR_14
set_location_assignment PIN_A27 -to HPS_DDR3_BA[0]
set_location_assignment PIN_A27 -to HPS_DDR3_BA_0
set_location_assignment PIN_H25 -to HPS_DDR3_BA[1]
set_location_assignment PIN_H25 -to HPS_DDR3_BA_1
set_location_assignment PIN_G25 -to HPS_DDR3_BA[2]
set_location_assignment PIN_G25 -to HPS_DDR3_BA_2
set_location_assignment PIN_A26 -to HPS_DDR3_CAS_N
set_location_assignment PIN_L28 -to HPS_DDR3_CKE
set_location_assignment PIN_N20 -to HPS_DDR3_CK_N
set_location_assignment PIN_N21 -to HPS_DDR3_CK_P
set_location_assignment PIN_L21 -to HPS_DDR3_CS_N
set_location_assignment PIN_G28 -to HPS_DDR3_DM[0]
set_location_assignment PIN_G28 -to HPS_DDR3_DM_0
set_location_assignment PIN_P28 -to HPS_DDR3_DM[1]
set_location_assignment PIN_P28 -to HPS_DDR3_DM_1
set_location_assignment PIN_W28 -to HPS_DDR3_DM[2]
set_location_assignment PIN_W28 -to HPS_DDR3_DM_2
set_location_assignment PIN_AB28 -to HPS_DDR3_DM[3]
set_location_assignment PIN_AB28 -to HPS_DDR3_DM_3
set_location_assignment PIN_J25 -to HPS_DDR3_DQ[0]
set_location_assignment PIN_J25 -to HPS_DDR3_DQ_0
set_location_assignment PIN_J24 -to HPS_DDR3_DQ[1]
set_location_assignment PIN_J24 -to HPS_DDR3_DQ_1
set_location_assignment PIN_E28 -to HPS_DDR3_DQ[2]
set_location_assignment PIN_E28 -to HPS_DDR3_DQ_2
set_location_assignment PIN_D27 -to HPS_DDR3_DQ[3]
set_location_assignment PIN_D27 -to HPS_DDR3_DQ_3
set_location_assignment PIN_J26 -to HPS_DDR3_DQ[4]
set_location_assignment PIN_J26 -to HPS_DDR3_DQ_4
set_location_assignment PIN_K26 -to HPS_DDR3_DQ[5]
set_location_assignment PIN_K26 -to HPS_DDR3_DQ_5
set_location_assignment PIN_G27 -to HPS_DDR3_DQ[6]
set_location_assignment PIN_G27 -to HPS_DDR3_DQ_6
set_location_assignment PIN_F28 -to HPS_DDR3_DQ[7]
set_location_assignment PIN_F28 -to HPS_DDR3_DQ_7
set_location_assignment PIN_K25 -to HPS_DDR3_DQ[8]
set_location_assignment PIN_K25 -to HPS_DDR3_DQ_8
set_location_assignment PIN_L25 -to HPS_DDR3_DQ[9]
set_location_assignment PIN_L25 -to HPS_DDR3_DQ_9
set_location_assignment PIN_J27 -to HPS_DDR3_DQ[10]
set_location_assignment PIN_J27 -to HPS_DDR3_DQ_10
set_location_assignment PIN_J28 -to HPS_DDR3_DQ[11]
set_location_assignment PIN_J28 -to HPS_DDR3_DQ_11
set_location_assignment PIN_M27 -to HPS_DDR3_DQ[12]
set_location_assignment PIN_M27 -to HPS_DDR3_DQ_12
set_location_assignment PIN_M26 -to HPS_DDR3_DQ[13]
set_location_assignment PIN_M26 -to HPS_DDR3_DQ_13
set_location_assignment PIN_M28 -to HPS_DDR3_DQ[14]
set_location_assignment PIN_M28 -to HPS_DDR3_DQ_14
set_location_assignment PIN_N28 -to HPS_DDR3_DQ[15]
set_location_assignment PIN_N28 -to HPS_DDR3_DQ_15
set_location_assignment PIN_N24 -to HPS_DDR3_DQ[16]
set_location_assignment PIN_N24 -to HPS_DDR3_DQ_16
set_location_assignment PIN_N25 -to HPS_DDR3_DQ[17]
set_location_assignment PIN_N25 -to HPS_DDR3_DQ_17
set_location_assignment PIN_T28 -to HPS_DDR3_DQ[18]
set_location_assignment PIN_T28 -to HPS_DDR3_DQ_18
set_location_assignment PIN_U28 -to HPS_DDR3_DQ[19]
set_location_assignment PIN_U28 -to HPS_DDR3_DQ_19
set_location_assignment PIN_N26 -to HPS_DDR3_DQ[20]
set_location_assignment PIN_N26 -to HPS_DDR3_DQ_20
set_location_assignment PIN_N27 -to HPS_DDR3_DQ[21]
set_location_assignment PIN_N27 -to HPS_DDR3_DQ_21
set_location_assignment PIN_R27 -to HPS_DDR3_DQ[22]
set_location_assignment PIN_R27 -to HPS_DDR3_DQ_22
set_location_assignment PIN_V27 -to HPS_DDR3_DQ[23]
set_location_assignment PIN_V27 -to HPS_DDR3_DQ_23
set_location_assignment PIN_R26 -to HPS_DDR3_DQ[24]
set_location_assignment PIN_R26 -to HPS_DDR3_DQ_24
set_location_assignment PIN_R25 -to HPS_DDR3_DQ[25]
set_location_assignment PIN_R25 -to HPS_DDR3_DQ_25
set_location_assignment PIN_AA28 -to HPS_DDR3_DQ[26]
set_location_assignment PIN_AA28 -to HPS_DDR3_DQ_26
set_location_assignment PIN_W26 -to HPS_DDR3_DQ[27]
set_location_assignment PIN_W26 -to HPS_DDR3_DQ_27
set_location_assignment PIN_R24 -to HPS_DDR3_DQ[28]
set_location_assignment PIN_R24 -to HPS_DDR3_DQ_28
set_location_assignment PIN_T24 -to HPS_DDR3_DQ[29]
set_location_assignment PIN_T24 -to HPS_DDR3_DQ_29
set_location_assignment PIN_Y27 -to HPS_DDR3_DQ[30]
set_location_assignment PIN_Y27 -to HPS_DDR3_DQ_30
set_location_assignment PIN_AA27 -to HPS_DDR3_DQ[31]
set_location_assignment PIN_AA27 -to HPS_DDR3_DQ_31
set_location_assignment PIN_R16 -to HPS_DDR3_DQS_N[0]
set_location_assignment PIN_R16 -to HPS_DDR3_DQS_N_0
set_location_assignment PIN_R18 -to HPS_DDR3_DQS_N[1]
set_location_assignment PIN_R18 -to HPS_DDR3_DQS_N_1
set_location_assignment PIN_T18 -to HPS_DDR3_DQS_N[2]
set_location_assignment PIN_T18 -to HPS_DDR3_DQS_N_2
set_location_assignment PIN_T20 -to HPS_DDR3_DQS_N[3]
set_location_assignment PIN_T20 -to HPS_DDR3_DQS_N_3
set_location_assignment PIN_R17 -to HPS_DDR3_DQS_P[0]
set_location_assignment PIN_R17 -to HPS_DDR3_DQS_P_0
set_location_assignment PIN_R19 -to HPS_DDR3_DQS_P[1]
set_location_assignment PIN_R19 -to HPS_DDR3_DQS_P_1
set_location_assignment PIN_T19 -to HPS_DDR3_DQS_P[2]
set_location_assignment PIN_T19 -to HPS_DDR3_DQS_P_2
set_location_assignment PIN_U19 -to HPS_DDR3_DQS_P[3]
set_location_assignment PIN_U19 -to HPS_DDR3_DQS_P_3
set_location_assignment PIN_D28 -to HPS_DDR3_ODT
set_location_assignment PIN_A25 -to HPS_DDR3_RAS_N
set_location_assignment PIN_V28 -to HPS_DDR3_RESET_N
set_location_assignment PIN_D25 -to HPS_DDR3_RZQ
set_location_assignment PIN_E25 -to HPS_DDR3_WE_N
set_location_assignment PIN_J15 -to HPS_ENET_GTX_CLK
set_location_assignment PIN_B14 -to HPS_ENET_INT_N
set_location_assignment PIN_A13 -to HPS_ENET_MDC
set_location_assignment PIN_E16 -to HPS_ENET_MDIO
set_location_assignment PIN_J12 -to HPS_ENET_RX_CLK
set_location_assignment PIN_A14 -to HPS_ENET_RX_DATA[0]
set_location_assignment PIN_A14 -to HPS_ENET_RX_DATA_0
set_location_assignment PIN_A11 -to HPS_ENET_RX_DATA[1]
set_location_assignment PIN_A11 -to HPS_ENET_RX_DATA_1
set_location_assignment PIN_C15 -to HPS_ENET_RX_DATA[2]
set_location_assignment PIN_C15 -to HPS_ENET_RX_DATA_2
set_location_assignment PIN_A9 -to HPS_ENET_RX_DATA[3]
set_location_assignment PIN_A9 -to HPS_ENET_RX_DATA_3
set_location_assignment PIN_J13 -to HPS_ENET_RX_DV
set_location_assignment PIN_A16 -to HPS_ENET_TX_DATA[0]
set_location_assignment PIN_A16 -to HPS_ENET_TX_DATA_0
set_location_assignment PIN_J14 -to HPS_ENET_TX_DATA[1]
set_location_assignment PIN_J14 -to HPS_ENET_TX_DATA_1
set_location_assignment PIN_A15 -to HPS_ENET_TX_DATA[2]
set_location_assignment PIN_A15 -to HPS_ENET_TX_DATA_2
set_location_assignment PIN_D17 -to HPS_ENET_TX_DATA[3]
set_location_assignment PIN_D17 -to HPS_ENET_TX_DATA_3
set_location_assignment PIN_A12 -to HPS_ENET_TX_EN
set_location_assignment PIN_A17 -to HPS_GSENSOR_INT
set_location_assignment PIN_C18 -to HPS_I2C0_SCLK
set_location_assignment PIN_A19 -to HPS_I2C0_SDAT
set_location_assignment PIN_K18 -to HPS_I2C1_SCLK
set_location_assignment PIN_A21 -to HPS_I2C1_SDAT
set_location_assignment PIN_J18 -to HPS_KEY_N
set_location_assignment PIN_A20 -to HPS_LED
set_location_assignment PIN_H13 -to HPS_LTC_GPIO
set_location_assignment PIN_B8 -to HPS_SD_CLK
set_location_assignment PIN_D14 -to HPS_SD_CMD
set_location_assignment PIN_C13 -to HPS_SD_DATA[0]
set_location_assignment PIN_C13 -to HPS_SD_DATA_0
set_location_assignment PIN_B6 -to HPS_SD_DATA[1]
set_location_assignment PIN_B6 -to HPS_SD_DATA_1
set_location_assignment PIN_B11 -to HPS_SD_DATA[2]
set_location_assignment PIN_B11 -to HPS_SD_DATA_2
set_location_assignment PIN_B9 -to HPS_SD_DATA[3]
set_location_assignment PIN_B9 -to HPS_SD_DATA_3
set_location_assignment PIN_C19 -to HPS_SPIM_CLK
set_location_assignment PIN_B19 -to HPS_SPIM_MISO
set_location_assignment PIN_B16 -to HPS_SPIM_MOSI
set_location_assignment PIN_C16 -to HPS_SPIM_SS
set_location_assignment PIN_A22 -to HPS_UART_RX
set_location_assignment PIN_B21 -to HPS_UART_TX
set_location_assignment PIN_G4 -to HPS_USB_CLKOUT
set_location_assignment PIN_C10 -to HPS_USB_DATA[0]
set_location_assignment PIN_C10 -to HPS_USB_DATA_0
set_location_assignment PIN_F5 -to HPS_USB_DATA[1]
set_location_assignment PIN_F5 -to HPS_USB_DATA_1
set_location_assignment PIN_C9 -to HPS_USB_DATA[2]
set_location_assignment PIN_C9 -to HPS_USB_DATA_2
set_location_assignment PIN_C4 -to HPS_USB_DATA[3]
set_location_assignment PIN_C4 -to HPS_USB_DATA_3
set_location_assignment PIN_C8 -to HPS_USB_DATA[4]
set_location_assignment PIN_C8 -to HPS_USB_DATA_4
set_location_assignment PIN_D4 -to HPS_USB_DATA[5]
set_location_assignment PIN_D4 -to HPS_USB_DATA_5
set_location_assignment PIN_C7 -to HPS_USB_DATA[6]
set_location_assignment PIN_C7 -to HPS_USB_DATA_6
set_location_assignment PIN_F4 -to HPS_USB_DATA[7]
set_location_assignment PIN_F4 -to HPS_USB_DATA_7
set_location_assignment PIN_E5 -to HPS_USB_DIR
set_location_assignment PIN_D5 -to HPS_USB_NXT
set_location_assignment PIN_C5 -to HPS_USB_STP
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_CONV_USB_N
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_ADDR[0]
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_ADDR_0
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_ADDR[1]
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_ADDR_1
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_ADDR[2]
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_ADDR_2
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_ADDR[3]
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_ADDR_3
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_ADDR[4]
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_ADDR_4
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_ADDR[5]
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_ADDR_5
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_ADDR[6]
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_ADDR_6
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_ADDR[7]
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_ADDR_7
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_ADDR[8]
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_ADDR_8
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_ADDR[9]
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_ADDR_9
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_ADDR[10]
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_ADDR_10
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_ADDR[11]
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_ADDR_11
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_ADDR[12]
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_ADDR_12
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_ADDR[13]
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_ADDR_13
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_ADDR[14]
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_ADDR_14
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_BA[0]
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_BA_0
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_BA[1]
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_BA_1
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_BA[2]
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_BA_2
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_CAS_N
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_CKE
set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.5-V SSTL CLASS I" -to HPS_DDR3_CK_N
set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.5-V SSTL CLASS I" -to HPS_DDR3_CK_P
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_CS_N
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_DM[0]
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_DM_0
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_DM[1]
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_DM_1
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_DM[2]
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_DM_2
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_DM[3]
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_DM_3
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_DQ[0]
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_DQ_0
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_DQ[1]
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_DQ_1
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_DQ[2]
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_DQ_2
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_DQ[3]
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_DQ_3
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_DQ[4]
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_DQ_4
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_DQ[5]
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_DQ_5
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_DQ[6]
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_DQ_6
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_DQ[7]
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_DQ_7
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_DQ[8]
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_DQ_8
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_DQ[9]
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_DQ_9
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_DQ[10]
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_DQ_10
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_DQ[11]
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_DQ_11
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_DQ[12]
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_DQ_12
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_DQ[13]
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_DQ_13
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_DQ[14]
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_DQ_14
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_DQ[15]
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_DQ_15
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_DQ[16]
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_DQ_16
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_DQ[17]
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_DQ_17
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_DQ[18]
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_DQ_18
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_DQ[19]
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_DQ_19
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_DQ[20]
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_DQ_20
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_DQ[21]
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_DQ_21
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_DQ[22]
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_DQ_22
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_DQ[23]
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_DQ_23
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_DQ[24]
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_DQ_24
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_DQ[25]
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_DQ_25
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_DQ[26]
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_DQ_26
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_DQ[27]
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_DQ_27
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_DQ[28]
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_DQ_28
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_DQ[29]
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_DQ_29
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_DQ[30]
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_DQ_30
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_DQ[31]
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_DQ_31
set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.5-V SSTL CLASS I" -to HPS_DDR3_DQS_N[0]
set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.5-V SSTL CLASS I" -to HPS_DDR3_DQS_N_0
set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.5-V SSTL CLASS I" -to HPS_DDR3_DQS_N[1]
set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.5-V SSTL CLASS I" -to HPS_DDR3_DQS_N_1
set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.5-V SSTL CLASS I" -to HPS_DDR3_DQS_N[2]
set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.5-V SSTL CLASS I" -to HPS_DDR3_DQS_N_2
set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.5-V SSTL CLASS I" -to HPS_DDR3_DQS_N[3]
set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.5-V SSTL CLASS I" -to HPS_DDR3_DQS_N_3
set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.5-V SSTL CLASS I" -to HPS_DDR3_DQS_P[0]
set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.5-V SSTL CLASS I" -to HPS_DDR3_DQS_P_0
set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.5-V SSTL CLASS I" -to HPS_DDR3_DQS_P[1]
set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.5-V SSTL CLASS I" -to HPS_DDR3_DQS_P_1
set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.5-V SSTL CLASS I" -to HPS_DDR3_DQS_P[2]
set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.5-V SSTL CLASS I" -to HPS_DDR3_DQS_P_2
set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.5-V SSTL CLASS I" -to HPS_DDR3_DQS_P[3]
set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.5-V SSTL CLASS I" -to HPS_DDR3_DQS_P_3
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_ODT
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_RAS_N
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_RESET_N
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_RZQ
set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to HPS_DDR3_WE_N
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_ENET_GTX_CLK
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_ENET_INT_N
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_ENET_MDC
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_ENET_MDIO
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_ENET_RX_CLK
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_ENET_RX_DATA[0]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_ENET_RX_DATA_0
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_ENET_RX_DATA[1]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_ENET_RX_DATA_1
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_ENET_RX_DATA[2]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_ENET_RX_DATA_2
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_ENET_RX_DATA[3]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_ENET_RX_DATA_3
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_ENET_RX_DV
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_ENET_TX_DATA[0]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_ENET_TX_DATA_0
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_ENET_TX_DATA[1]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_ENET_TX_DATA_1
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_ENET_TX_DATA[2]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_ENET_TX_DATA_2
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_ENET_TX_DATA[3]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_ENET_TX_DATA_3
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_ENET_TX_EN
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_GSENSOR_INT
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_I2C0_SCLK
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_I2C0_SDAT
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_I2C1_SCLK
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_I2C1_SDAT
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_KEY_N
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_LED
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_LTC_GPIO
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_SD_CLK
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_SD_CMD
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_SD_DATA[0]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_SD_DATA_0
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_SD_DATA[1]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_SD_DATA_1
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_SD_DATA[2]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_SD_DATA_2
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_SD_DATA[3]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_SD_DATA_3
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_SPIM_CLK
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_SPIM_MISO
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_SPIM_MOSI
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_SPIM_SS
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_UART_RX
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_UART_TX
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_USB_CLKOUT
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_USB_DATA[0]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_USB_DATA_0
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_USB_DATA[1]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_USB_DATA_1
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_USB_DATA[2]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_USB_DATA_2
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_USB_DATA[3]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_USB_DATA_3
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_USB_DATA[4]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_USB_DATA_4
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_USB_DATA[5]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_USB_DATA_5
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_USB_DATA[6]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_USB_DATA_6
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_USB_DATA[7]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_USB_DATA_7
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_USB_DIR
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_USB_NXT
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HPS_USB_STP
#============================================================
# KEY_N
#============================================================
set_location_assignment PIN_AH17 -to KEY_N[0]
set_location_assignment PIN_AH17 -to KEY_N_0
set_location_assignment PIN_AH16 -to KEY_N[1]
set_location_assignment PIN_AH16 -to KEY_N_1
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to KEY_N[0]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to KEY_N_0
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to KEY_N[1]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to KEY_N_1
#============================================================
# LED
#============================================================
set_location_assignment PIN_W15 -to LED[0]
set_location_assignment PIN_W15 -to LED_0
set_location_assignment PIN_AA24 -to LED[1]
set_location_assignment PIN_AA24 -to LED_1
set_location_assignment PIN_V16 -to LED[2]
set_location_assignment PIN_V16 -to LED_2
set_location_assignment PIN_V15 -to LED[3]
set_location_assignment PIN_V15 -to LED_3
set_location_assignment PIN_AF26 -to LED[4]
set_location_assignment PIN_AF26 -to LED_4
set_location_assignment PIN_AE26 -to LED[5]
set_location_assignment PIN_AE26 -to LED_5
set_location_assignment PIN_Y16 -to LED[6]
set_location_assignment PIN_Y16 -to LED_6
set_location_assignment PIN_AA23 -to LED[7]
set_location_assignment PIN_AA23 -to LED_7
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[0]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED_0
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[1]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED_1
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[2]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED_2
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[3]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED_3
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[4]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED_4
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[5]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED_5
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[6]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED_6
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED[7]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED_7
#============================================================
# SW
#============================================================
set_location_assignment PIN_L10 -to SW[0]
set_location_assignment PIN_L10 -to SW_0
set_location_assignment PIN_L9 -to SW[1]
set_location_assignment PIN_L9 -to SW_1
set_location_assignment PIN_H6 -to SW[2]
set_location_assignment PIN_H6 -to SW_2
set_location_assignment PIN_H5 -to SW[3]
set_location_assignment PIN_H5 -to SW_3
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[0]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW_0
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[1]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW_1
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[2]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW_2
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW[3]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SW_3
#============================================================
# GPIO_0, GPIO_0 connect to GPIO Default
#============================================================
set_location_assignment PIN_V12 -to PIO_INT_N
set_location_assignment PIN_AE11 -to PIO_SCL
set_location_assignment PIN_AE12 -to PIO_SDA
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to PIO_INT_N
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to PIO_SCL
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to PIO_SDA
set_location_assignment PIN_AF7 -to PIR_OUT
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to PIR_OUT
set_location_assignment PIN_W12 -to CAM_PAL_VGA_SDA
set_location_assignment PIN_AF8 -to CAM_PAL_VGA_SCL
set_location_assignment PIN_T11 -to CAM_SYS_CLK
set_location_assignment PIN_AG6 -to CAM_LV
set_location_assignment PIN_AH2 -to CAM_PIX_CLK
set_location_assignment PIN_AE4 -to CAM_FV
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to CAM_PAL_VGA_SDA
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to CAM_PAL_VGA_SCL
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to CAM_SYS_CLK
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to CAM_LV
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to CAM_PIX_CLK
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to CAM_FV
set_location_assignment PIN_Y8 -to PAL_VD_HSO
set_location_assignment PIN_AB4 -to PAL_VD_VSO
set_location_assignment PIN_AG5 -to PAL_VD_VD[0]
set_location_assignment PIN_AG5 -to PAL_VD_VD_0
set_location_assignment PIN_AH5 -to PAL_VD_VD[1]
set_location_assignment PIN_AH5 -to PAL_VD_VD_1
set_location_assignment PIN_AH6 -to PAL_VD_VD[2]
set_location_assignment PIN_AH6 -to PAL_VD_VD_2
set_location_assignment PIN_T8 -to PAL_VD_VD[3]
set_location_assignment PIN_T8 -to PAL_VD_VD_3
set_location_assignment PIN_T12 -to PAL_VD_VD[4]
set_location_assignment PIN_T12 -to PAL_VD_VD_4
set_location_assignment PIN_Y5 -to PAL_VD_VD[5]
set_location_assignment PIN_Y5 -to PAL_VD_VD_5
set_location_assignment PIN_Y4 -to PAL_VD_VD[6]
set_location_assignment PIN_Y4 -to PAL_VD_VD_6
set_location_assignment PIN_W8 -to PAL_VD_VD[7]
set_location_assignment PIN_W8 -to PAL_VD_VD_7
set_location_assignment PIN_AH4 -to PAL_VD_CLKO
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to PAL_VD_HSO
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to PAL_VD_VSO
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to PAL_VD_VD[0]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to PAL_VD_VD_0
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to PAL_VD_VD[1]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to PAL_VD_VD_1
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to PAL_VD_VD[2]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to PAL_VD_VD_2
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to PAL_VD_VD[3]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to PAL_VD_VD_3
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to PAL_VD_VD[4]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to PAL_VD_VD_4
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to PAL_VD_VD[5]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to PAL_VD_VD_5
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to PAL_VD_VD[6]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to PAL_VD_VD_6
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to PAL_VD_VD[7]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to PAL_VD_VD_7
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to PAL_VD_CLKO
set_location_assignment PIN_AH3 -to SERVO_0
set_location_assignment PIN_AF4 -to SERVO_1
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SERVO_0
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SERVO_1
set_location_assignment PIN_AD12 -to J0_SPI_CLK
set_location_assignment PIN_AD11 -to J0_SPI_MISO
set_location_assignment PIN_AF9 -to J0_SPI_CS_N
set_location_assignment PIN_AD10 -to J0_SPI_MOSI
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to J0_SPI_CLK
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to J0_SPI_MISO
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to J0_SPI_CS_N
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to J0_SPI_MOSI
set_location_assignment PIN_AF5 -to FROM_ESP_TXD
set_location_assignment PIN_T13 -to TO_ESP_RXD
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FROM_ESP_TXD
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to TO_ESP_RXD
set_location_assignment PIN_AE7 -to SPI_MISO
set_location_assignment PIN_AF6 -to SPI_ENA_N
set_location_assignment PIN_AE8 -to SPI_CLK
set_location_assignment PIN_AE9 -to SPI_MOSI
set_location_assignment PIN_AF10 -to SPI_DAT
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SPI_MISO
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SPI_ENA_N
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SPI_CLK
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SPI_MOSI
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SPI_DAT
set_location_assignment PIN_AF11 -to LED_BGR
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LED_BGR
#============================================================
# GPIO_1, GPIO_1 connect to GPIO Default
#============================================================
set_location_assignment PIN_AA15 -to RESET_N
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to RESET_N
set_location_assignment PIN_AG28 -to TS_SCL
set_location_assignment PIN_AH27 -to TS_SDA
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to TS_SCL
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to TS_SDA
set_location_assignment PIN_Y15 -to LCD_PIN_DAV_N
set_location_assignment PIN_AG26 -to LCD_DE
set_location_assignment PIN_AF23 -to LCD_DISPLAY_EN
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LCD_PIN_DAV_N
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LCD_DE
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LCD_DISPLAY_EN
set_location_assignment PIN_AH24 -to BLT_TXD
set_location_assignment PIN_AE22 -to BLT_RXD
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to BLT_TXD
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to BLT_RXD
set_location_assignment PIN_AG20 -to BOARD_ID
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to BOARD_ID
set_location_assignment PIN_AF21 -to VIDEO_HSYNC
set_location_assignment PIN_AG19 -to VIDEO_VSYNC
set_location_assignment PIN_AF20 -to VIDEO_CLK
set_location_assignment PIN_AG23 -to VIDEO_B[0]
set_location_assignment PIN_AG23 -to VIDEO_B_0
set_location_assignment PIN_AH23 -to VIDEO_B[1]
set_location_assignment PIN_AH23 -to VIDEO_B_1
set_location_assignment PIN_AF25 -to VIDEO_B[2]
set_location_assignment PIN_AF25 -to VIDEO_B_2
set_location_assignment PIN_AG24 -to VIDEO_B[3]
set_location_assignment PIN_AG24 -to VIDEO_B_3
set_location_assignment PIN_AA19 -to VIDEO_B[4]
set_location_assignment PIN_AA19 -to VIDEO_B_4
set_location_assignment PIN_AH26 -to VIDEO_B[5]
set_location_assignment PIN_AH26 -to VIDEO_B_5
set_location_assignment PIN_AG18 -to VIDEO_B[6]
set_location_assignment PIN_AG18 -to VIDEO_B_6
set_location_assignment PIN_AC23 -to VIDEO_B[7]
set_location_assignment PIN_AC23 -to VIDEO_B_7
set_location_assignment PIN_AH22 -to VIDEO_G[0]
set_location_assignment PIN_AH22 -to VIDEO_G_0
set_location_assignment PIN_AF22 -to VIDEO_G[1]
set_location_assignment PIN_AF22 -to VIDEO_G_1
set_location_assignment PIN_AD20 -to VIDEO_G[2]
set_location_assignment PIN_AD20 -to VIDEO_G_2
set_location_assignment PIN_AE24 -to VIDEO_G[3]
set_location_assignment PIN_AE24 -to VIDEO_G_3
set_location_assignment PIN_AE20 -to VIDEO_G[4]
set_location_assignment PIN_AE20 -to VIDEO_G_4
set_location_assignment PIN_AD19 -to VIDEO_G[5]
set_location_assignment PIN_AD19 -to VIDEO_G_5
set_location_assignment PIN_AF18 -to VIDEO_G[6]
set_location_assignment PIN_AF18 -to VIDEO_G_6
set_location_assignment PIN_AE19 -to VIDEO_G[7]
set_location_assignment PIN_AE19 -to VIDEO_G_7
set_location_assignment PIN_AC22 -to VIDEO_R[0]
set_location_assignment PIN_AC22 -to VIDEO_R_0
set_location_assignment PIN_AA18 -to VIDEO_R[1]
set_location_assignment PIN_AA18 -to VIDEO_R_1
set_location_assignment PIN_AE23 -to VIDEO_R[2]
set_location_assignment PIN_AE23 -to VIDEO_R_2
set_location_assignment PIN_AD23 -to VIDEO_R[3]
set_location_assignment PIN_AD23 -to VIDEO_R_3
set_location_assignment PIN_AH18 -to VIDEO_R[4]
set_location_assignment PIN_AH18 -to VIDEO_R_4
set_location_assignment PIN_AG21 -to VIDEO_R[5]
set_location_assignment PIN_AG21 -to VIDEO_R_5
set_location_assignment PIN_AH21 -to VIDEO_R[6]
set_location_assignment PIN_AH21 -to VIDEO_R_6
set_location_assignment PIN_AH19 -to VIDEO_R[7]
set_location_assignment PIN_AH19 -to VIDEO_R_7
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VIDEO_HSYNC
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VIDEO_VSYNC
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VIDEO_CLK
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VIDEO_B[0]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VIDEO_B_0
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VIDEO_B[1]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VIDEO_B_1
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VIDEO_B[2]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VIDEO_B_2
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VIDEO_B[3]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VIDEO_B_3
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VIDEO_B[4]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VIDEO_B_4
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VIDEO_B[5]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VIDEO_B_5
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VIDEO_B[6]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VIDEO_B_6
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VIDEO_B[7]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VIDEO_B_7
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VIDEO_G[0]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VIDEO_G_0
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VIDEO_G[1]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VIDEO_G_1
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VIDEO_G[2]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VIDEO_G_2
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VIDEO_G[3]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VIDEO_G_3
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VIDEO_G[4]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VIDEO_G_4
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VIDEO_G[5]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VIDEO_G_5
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VIDEO_G[6]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VIDEO_G_6
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VIDEO_G[7]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VIDEO_G_7
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VIDEO_R[0]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VIDEO_R_0
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VIDEO_R[1]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VIDEO_R_1
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VIDEO_R[2]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VIDEO_R_2
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VIDEO_R[3]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VIDEO_R_3
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VIDEO_R[4]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VIDEO_R_4
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VIDEO_R[5]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VIDEO_R_5
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VIDEO_R[6]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VIDEO_R_6
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VIDEO_R[7]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to VIDEO_R_7

View File

@@ -0,0 +1,6 @@
create_clock -period 20 [get_ports FPGA_CLK1_50]
create_clock -period 20 [get_ports FPGA_CLK2_50]
create_clock -period 20 [get_ports FPGA_CLK3_50]
derive_pll_clocks
derive_clock_uncertainty

View File

@@ -0,0 +1,649 @@
<?xml version="1.0" encoding="UTF-8"?>
<system name="$${FILENAME}">
<component
name="$${FILENAME}"
displayName="$${FILENAME}"
version="1.0"
description=""
tags=""
categories="System" />
<parameter name="bonusData"><![CDATA[bonusData
{
element clk_0
{
datum _sortIndex
{
value = "0";
type = "int";
}
}
element hps_0
{
datum _sortIndex
{
value = "1";
type = "int";
}
}
element soc_system
{
datum _originalDeviceFamily
{
value = "Cyclone V";
type = "String";
}
}
element soc_system
{
datum _originalDeviceFamily
{
value = "Cyclone V";
type = "String";
}
}
element soc_system
{
datum _originalDeviceFamily
{
value = "Cyclone V";
type = "String";
}
}
element soc_system
{
datum _originalDeviceFamily
{
value = "Cyclone V";
type = "String";
}
}
element soc_system
{
datum _originalDeviceFamily
{
value = "Cyclone V";
type = "String";
}
}
element soc_system
{
datum _originalDeviceFamily
{
value = "Cyclone V";
type = "String";
}
}
element soc_system
{
datum _originalDeviceFamily
{
value = "Cyclone V";
type = "String";
}
}
}
]]></parameter>
<parameter name="clockCrossingAdapter" value="HANDSHAKE" />
<parameter name="device" value="5CSEMA4U23C6" />
<parameter name="deviceFamily" value="Cyclone V" />
<parameter name="deviceSpeedGrade" value="6" />
<parameter name="fabricMode" value="QSYS" />
<parameter name="generateLegacySim" value="false" />
<parameter name="generationId" value="0" />
<parameter name="globalResetBus" value="false" />
<parameter name="hdlLanguage" value="VERILOG" />
<parameter name="hideFromIPCatalog" value="false" />
<parameter name="lockedInterfaceDefinition" value="" />
<parameter name="maxAdditionalLatency" value="1" />
<parameter name="projectName" value="lab_3_0.qpf" />
<parameter name="sopcBorderPoints" value="false" />
<parameter name="systemHash" value="0" />
<parameter name="testBenchDutName" value="" />
<parameter name="timeStamp" value="0" />
<parameter name="useTestBenchNamingPattern" value="false" />
<instanceScript></instanceScript>
<interface name="clk" internal="clk_0.clk_in" type="clock" dir="end" />
<interface name="hps_0_io" internal="hps_0.hps_io" />
<interface name="reset" internal="clk_0.clk_in_reset" type="reset" dir="end" />
<module name="clk_0" kind="clock_source" version="16.0" enabled="1">
<parameter name="clockFrequency" value="50000000" />
<parameter name="clockFrequencyKnown" value="true" />
<parameter name="inputClockFrequency" value="0" />
<parameter name="resetSynchronousEdges" value="NONE" />
</module>
<module name="hps_0" kind="altera_hps" version="16.0" enabled="1">
<parameter name="ABSTRACT_REAL_COMPARE_TEST" value="false" />
<parameter name="ABS_RAM_MEM_INIT_FILENAME" value="meminit" />
<parameter name="ACV_PHY_CLK_ADD_FR_PHASE" value="0.0" />
<parameter name="AC_PACKAGE_DESKEW" value="false" />
<parameter name="AC_ROM_USER_ADD_0" value="0_0000_0000_0000" />
<parameter name="AC_ROM_USER_ADD_1" value="0_0000_0000_1000" />
<parameter name="ADDR_ORDER" value="0" />
<parameter name="ADD_EFFICIENCY_MONITOR" value="false" />
<parameter name="ADD_EXTERNAL_SEQ_DEBUG_NIOS" value="false" />
<parameter name="ADVANCED_CK_PHASES" value="false" />
<parameter name="ADVERTIZE_SEQUENCER_SW_BUILD_FILES" value="false" />
<parameter name="AFI_DEBUG_INFO_WIDTH" value="32" />
<parameter name="ALTMEMPHY_COMPATIBLE_MODE" value="false" />
<parameter name="AP_MODE" value="false" />
<parameter name="AP_MODE_EN" value="0" />
<parameter name="AUTO_DEVICE_SPEEDGRADE" value="6" />
<parameter name="AUTO_PD_CYCLES" value="0" />
<parameter name="AUTO_POWERDN_EN" value="false" />
<parameter name="AVL_DATA_WIDTH_PORT" value="32,32,32,32,32,32" />
<parameter name="AVL_MAX_SIZE" value="4" />
<parameter name="BONDING_OUT_ENABLED" value="false" />
<parameter name="BOOTFROMFPGA_Enable" value="false" />
<parameter name="BSEL" value="1" />
<parameter name="BSEL_EN" value="false" />
<parameter name="BYTE_ENABLE" value="true" />
<parameter name="C2P_WRITE_CLOCK_ADD_PHASE" value="0.0" />
<parameter name="CALIBRATION_MODE" value="Skip" />
<parameter name="CALIB_REG_WIDTH" value="8" />
<parameter name="CAN0_Mode" value="N/A" />
<parameter name="CAN0_PinMuxing" value="Unused" />
<parameter name="CAN1_Mode" value="N/A" />
<parameter name="CAN1_PinMuxing" value="Unused" />
<parameter name="CFG_DATA_REORDERING_TYPE" value="INTER_BANK" />
<parameter name="CFG_REORDER_DATA" value="true" />
<parameter name="CFG_TCCD_NS" value="2.5" />
<parameter name="COMMAND_PHASE" value="0.0" />
<parameter name="CONTROLLER_LATENCY" value="5" />
<parameter name="CORE_DEBUG_CONNECTION" value="EXPORT" />
<parameter name="CPORT_TYPE_PORT">Bidirectional,Bidirectional,Bidirectional,Bidirectional,Bidirectional,Bidirectional</parameter>
<parameter name="CSEL" value="0" />
<parameter name="CSEL_EN" value="false" />
<parameter name="CTI_Enable" value="false" />
<parameter name="CTL_AUTOPCH_EN" value="false" />
<parameter name="CTL_CMD_QUEUE_DEPTH" value="8" />
<parameter name="CTL_CSR_CONNECTION" value="INTERNAL_JTAG" />
<parameter name="CTL_CSR_ENABLED" value="false" />
<parameter name="CTL_CSR_READ_ONLY" value="1" />
<parameter name="CTL_DEEP_POWERDN_EN" value="false" />
<parameter name="CTL_DYNAMIC_BANK_ALLOCATION" value="false" />
<parameter name="CTL_DYNAMIC_BANK_NUM" value="4" />
<parameter name="CTL_ECC_AUTO_CORRECTION_ENABLED" value="false" />
<parameter name="CTL_ECC_ENABLED" value="false" />
<parameter name="CTL_ENABLE_BURST_INTERRUPT" value="false" />
<parameter name="CTL_ENABLE_BURST_TERMINATE" value="false" />
<parameter name="CTL_HRB_ENABLED" value="false" />
<parameter name="CTL_LOOK_AHEAD_DEPTH" value="4" />
<parameter name="CTL_SELF_REFRESH_EN" value="false" />
<parameter name="CTL_USR_REFRESH_EN" value="false" />
<parameter name="CTL_ZQCAL_EN" value="false" />
<parameter name="CUT_NEW_FAMILY_TIMING" value="true" />
<parameter name="DAT_DATA_WIDTH" value="32" />
<parameter name="DEBUGAPB_Enable" value="false" />
<parameter name="DEBUG_MODE" value="false" />
<parameter name="DEVICE_DEPTH" value="1" />
<parameter name="DEVICE_FAMILY_PARAM" value="" />
<parameter name="DISABLE_CHILD_MESSAGING" value="false" />
<parameter name="DISCRETE_FLY_BY" value="true" />
<parameter name="DLL_SHARING_MODE" value="None" />
<parameter name="DMA_Enable">No,No,No,No,No,No,No,No</parameter>
<parameter name="DQS_DQSN_MODE" value="DIFFERENTIAL" />
<parameter name="DQ_INPUT_REG_USE_CLKN" value="false" />
<parameter name="DUPLICATE_AC" value="false" />
<parameter name="ED_EXPORT_SEQ_DEBUG" value="false" />
<parameter name="EMAC0_Mode" value="N/A" />
<parameter name="EMAC0_PTP" value="false" />
<parameter name="EMAC0_PinMuxing" value="Unused" />
<parameter name="EMAC1_Mode" value="N/A" />
<parameter name="EMAC1_PTP" value="false" />
<parameter name="EMAC1_PinMuxing" value="Unused" />
<parameter name="ENABLE_ABS_RAM_MEM_INIT" value="false" />
<parameter name="ENABLE_BONDING" value="false" />
<parameter name="ENABLE_BURST_MERGE" value="false" />
<parameter name="ENABLE_CTRL_AVALON_INTERFACE" value="true" />
<parameter name="ENABLE_DELAY_CHAIN_WRITE" value="false" />
<parameter name="ENABLE_EMIT_BFM_MASTER" value="false" />
<parameter name="ENABLE_EXPORT_SEQ_DEBUG_BRIDGE" value="false" />
<parameter name="ENABLE_EXTRA_REPORTING" value="false" />
<parameter name="ENABLE_ISS_PROBES" value="false" />
<parameter name="ENABLE_NON_DESTRUCTIVE_CALIB" value="false" />
<parameter name="ENABLE_NON_DES_CAL" value="false" />
<parameter name="ENABLE_NON_DES_CAL_TEST" value="false" />
<parameter name="ENABLE_SEQUENCER_MARGINING_ON_BY_DEFAULT" value="false" />
<parameter name="ENABLE_USER_ECC" value="false" />
<parameter name="EXPORT_AFI_HALF_CLK" value="false" />
<parameter name="EXTRA_SETTINGS" value="" />
<parameter name="F2H_AXI_CLOCK_FREQ" value="100" />
<parameter name="F2H_SDRAM0_CLOCK_FREQ" value="100" />
<parameter name="F2H_SDRAM1_CLOCK_FREQ" value="100" />
<parameter name="F2H_SDRAM2_CLOCK_FREQ" value="100" />
<parameter name="F2H_SDRAM3_CLOCK_FREQ" value="100" />
<parameter name="F2H_SDRAM4_CLOCK_FREQ" value="100" />
<parameter name="F2H_SDRAM5_CLOCK_FREQ" value="100" />
<parameter name="F2SCLK_COLDRST_Enable" value="false" />
<parameter name="F2SCLK_DBGRST_Enable" value="false" />
<parameter name="F2SCLK_PERIPHCLK_Enable" value="false" />
<parameter name="F2SCLK_PERIPHCLK_FREQ" value="0" />
<parameter name="F2SCLK_SDRAMCLK_Enable" value="false" />
<parameter name="F2SCLK_SDRAMCLK_FREQ" value="0" />
<parameter name="F2SCLK_WARMRST_Enable" value="false" />
<parameter name="F2SDRAM_Type" value="" />
<parameter name="F2SDRAM_Width" value="" />
<parameter name="F2SINTERRUPT_Enable" value="false" />
<parameter name="F2S_Width" value="0" />
<parameter name="FIX_READ_LATENCY" value="8" />
<parameter name="FORCED_NON_LDC_ADDR_CMD_MEM_CK_INVERT" value="false" />
<parameter name="FORCED_NUM_WRITE_FR_CYCLE_SHIFTS" value="0" />
<parameter name="FORCE_DQS_TRACKING" value="AUTO" />
<parameter name="FORCE_MAX_LATENCY_COUNT_WIDTH" value="0" />
<parameter name="FORCE_SEQUENCER_TCL_DEBUG_MODE" value="false" />
<parameter name="FORCE_SHADOW_REGS" value="AUTO" />
<parameter name="FORCE_SYNTHESIS_LANGUAGE" value="" />
<parameter name="FPGA_PERIPHERAL_INPUT_CLOCK_FREQ_EMAC0_RX_CLK_IN" value="100" />
<parameter name="FPGA_PERIPHERAL_INPUT_CLOCK_FREQ_EMAC0_TX_CLK_IN" value="100" />
<parameter name="FPGA_PERIPHERAL_INPUT_CLOCK_FREQ_EMAC1_RX_CLK_IN" value="100" />
<parameter name="FPGA_PERIPHERAL_INPUT_CLOCK_FREQ_EMAC1_TX_CLK_IN" value="100" />
<parameter
name="FPGA_PERIPHERAL_INPUT_CLOCK_FREQ_EMAC_PTP_REF_CLOCK"
value="100" />
<parameter name="FPGA_PERIPHERAL_INPUT_CLOCK_FREQ_I2C0_SCL_IN" value="100" />
<parameter name="FPGA_PERIPHERAL_INPUT_CLOCK_FREQ_I2C1_SCL_IN" value="100" />
<parameter name="FPGA_PERIPHERAL_INPUT_CLOCK_FREQ_I2C2_SCL_IN" value="100" />
<parameter name="FPGA_PERIPHERAL_INPUT_CLOCK_FREQ_I2C3_SCL_IN" value="100" />
<parameter name="FPGA_PERIPHERAL_INPUT_CLOCK_FREQ_SDIO_CLK_IN" value="100" />
<parameter name="FPGA_PERIPHERAL_INPUT_CLOCK_FREQ_SPIS0_SCLK_IN" value="100" />
<parameter name="FPGA_PERIPHERAL_INPUT_CLOCK_FREQ_SPIS1_SCLK_IN" value="100" />
<parameter name="FPGA_PERIPHERAL_INPUT_CLOCK_FREQ_USB0_CLK_IN" value="100" />
<parameter name="FPGA_PERIPHERAL_INPUT_CLOCK_FREQ_USB1_CLK_IN" value="100" />
<parameter name="FPGA_PERIPHERAL_OUTPUT_CLOCK_FREQ_EMAC0_GTX_CLK" value="125" />
<parameter name="FPGA_PERIPHERAL_OUTPUT_CLOCK_FREQ_EMAC0_MD_CLK" value="2.5" />
<parameter name="FPGA_PERIPHERAL_OUTPUT_CLOCK_FREQ_EMAC1_GTX_CLK" value="125" />
<parameter name="FPGA_PERIPHERAL_OUTPUT_CLOCK_FREQ_EMAC1_MD_CLK" value="2.5" />
<parameter name="FPGA_PERIPHERAL_OUTPUT_CLOCK_FREQ_I2C0_CLK" value="100" />
<parameter name="FPGA_PERIPHERAL_OUTPUT_CLOCK_FREQ_I2C1_CLK" value="100" />
<parameter name="FPGA_PERIPHERAL_OUTPUT_CLOCK_FREQ_I2C2_CLK" value="100" />
<parameter name="FPGA_PERIPHERAL_OUTPUT_CLOCK_FREQ_I2C3_CLK" value="100" />
<parameter name="FPGA_PERIPHERAL_OUTPUT_CLOCK_FREQ_QSPI_SCLK_OUT" value="100" />
<parameter name="FPGA_PERIPHERAL_OUTPUT_CLOCK_FREQ_SDIO_CCLK" value="100" />
<parameter name="FPGA_PERIPHERAL_OUTPUT_CLOCK_FREQ_SPIM0_SCLK_OUT" value="100" />
<parameter name="FPGA_PERIPHERAL_OUTPUT_CLOCK_FREQ_SPIM1_SCLK_OUT" value="100" />
<parameter name="GPIO_Enable">No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No</parameter>
<parameter name="GP_Enable" value="false" />
<parameter name="H2F_AXI_CLOCK_FREQ" value="100" />
<parameter name="H2F_CTI_CLOCK_FREQ" value="100" />
<parameter name="H2F_DEBUG_APB_CLOCK_FREQ" value="100" />
<parameter name="H2F_LW_AXI_CLOCK_FREQ" value="100" />
<parameter name="H2F_TPIU_CLOCK_IN_FREQ" value="100" />
<parameter name="HARD_EMIF" value="true" />
<parameter name="HCX_COMPAT_MODE" value="false" />
<parameter name="HHP_HPS" value="true" />
<parameter name="HHP_HPS_SIMULATION" value="false" />
<parameter name="HHP_HPS_VERIFICATION" value="false" />
<parameter name="HLGPI_Enable" value="false" />
<parameter name="HPS_PROTOCOL" value="DDR3" />
<parameter name="I2C0_Mode" value="N/A" />
<parameter name="I2C0_PinMuxing" value="Unused" />
<parameter name="I2C1_Mode" value="N/A" />
<parameter name="I2C1_PinMuxing" value="Unused" />
<parameter name="I2C2_Mode" value="N/A" />
<parameter name="I2C2_PinMuxing" value="Unused" />
<parameter name="I2C3_Mode" value="N/A" />
<parameter name="I2C3_PinMuxing" value="Unused" />
<parameter name="INCLUDE_BOARD_DELAY_MODEL" value="false" />
<parameter name="INCLUDE_MULTIRANK_BOARD_DELAY_MODEL" value="false" />
<parameter name="IS_ES_DEVICE" value="false" />
<parameter name="LOANIO_Enable">No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No</parameter>
<parameter name="LOCAL_ID_WIDTH" value="8" />
<parameter name="LRDIMM_EXTENDED_CONFIG">0x000000000000000000</parameter>
<parameter name="LWH2F_Enable" value="false" />
<parameter name="MARGIN_VARIATION_TEST" value="false" />
<parameter name="MAX_PENDING_RD_CMD" value="32" />
<parameter name="MAX_PENDING_WR_CMD" value="16" />
<parameter name="MEM_ASR" value="Manual" />
<parameter name="MEM_ATCL" value="Disabled" />
<parameter name="MEM_AUTO_LEVELING_MODE" value="true" />
<parameter name="MEM_BANKADDR_WIDTH" value="3" />
<parameter name="MEM_BL" value="OTF" />
<parameter name="MEM_BT" value="Sequential" />
<parameter name="MEM_CK_PHASE" value="0.0" />
<parameter name="MEM_CK_WIDTH" value="1" />
<parameter name="MEM_CLK_EN_WIDTH" value="1" />
<parameter name="MEM_CLK_FREQ" value="400.0" />
<parameter name="MEM_CLK_FREQ_MAX" value="800.0" />
<parameter name="MEM_COL_ADDR_WIDTH" value="10" />
<parameter name="MEM_CS_WIDTH" value="1" />
<parameter name="MEM_DEVICE" value="MISSING_MODEL" />
<parameter name="MEM_DLL_EN" value="true" />
<parameter name="MEM_DQ_PER_DQS" value="8" />
<parameter name="MEM_DQ_WIDTH" value="32" />
<parameter name="MEM_DRV_STR" value="RZQ/6" />
<parameter name="MEM_FORMAT" value="DISCRETE" />
<parameter name="MEM_GUARANTEED_WRITE_INIT" value="false" />
<parameter name="MEM_IF_BOARD_BASE_DELAY" value="10" />
<parameter name="MEM_IF_DM_PINS_EN" value="true" />
<parameter name="MEM_IF_DQSN_EN" value="true" />
<parameter name="MEM_IF_SIM_VALID_WINDOW" value="0" />
<parameter name="MEM_INIT_EN" value="false" />
<parameter name="MEM_INIT_FILE" value="" />
<parameter name="MEM_MIRROR_ADDRESSING" value="0" />
<parameter name="MEM_NUMBER_OF_DIMMS" value="1" />
<parameter name="MEM_NUMBER_OF_RANKS_PER_DEVICE" value="1" />
<parameter name="MEM_NUMBER_OF_RANKS_PER_DIMM" value="1" />
<parameter name="MEM_PD" value="DLL off" />
<parameter name="MEM_RANK_MULTIPLICATION_FACTOR" value="1" />
<parameter name="MEM_ROW_ADDR_WIDTH" value="15" />
<parameter name="MEM_RTT_NOM" value="RZQ/6" />
<parameter name="MEM_RTT_WR" value="Dynamic ODT off" />
<parameter name="MEM_SRT" value="Normal" />
<parameter name="MEM_TCL" value="7" />
<parameter name="MEM_TFAW_NS" value="37.5" />
<parameter name="MEM_TINIT_US" value="500" />
<parameter name="MEM_TMRD_CK" value="4" />
<parameter name="MEM_TRAS_NS" value="35.0" />
<parameter name="MEM_TRCD_NS" value="13.75" />
<parameter name="MEM_TREFI_US" value="7.8" />
<parameter name="MEM_TRFC_NS" value="300.0" />
<parameter name="MEM_TRP_NS" value="13.75" />
<parameter name="MEM_TRRD_NS" value="7.5" />
<parameter name="MEM_TRTP_NS" value="7.5" />
<parameter name="MEM_TWR_NS" value="15.0" />
<parameter name="MEM_TWTR" value="4" />
<parameter name="MEM_USER_LEVELING_MODE" value="Leveling" />
<parameter name="MEM_VENDOR" value="Other" />
<parameter name="MEM_VERBOSE" value="true" />
<parameter name="MEM_VOLTAGE" value="1.5V DDR3" />
<parameter name="MEM_WTCL" value="7" />
<parameter name="MPU_EVENTS_Enable" value="false" />
<parameter name="MRS_MIRROR_PING_PONG_ATSO" value="false" />
<parameter name="MULTICAST_EN" value="false" />
<parameter name="NAND_Mode" value="N/A" />
<parameter name="NAND_PinMuxing" value="Unused" />
<parameter name="NEXTGEN" value="true" />
<parameter name="NIOS_ROM_DATA_WIDTH" value="32" />
<parameter name="NUM_DLL_SHARING_INTERFACES" value="1" />
<parameter name="NUM_EXTRA_REPORT_PATH" value="10" />
<parameter name="NUM_OCT_SHARING_INTERFACES" value="1" />
<parameter name="NUM_OF_PORTS" value="1" />
<parameter name="NUM_PLL_SHARING_INTERFACES" value="1" />
<parameter name="OCT_SHARING_MODE" value="None" />
<parameter name="P2C_READ_CLOCK_ADD_PHASE" value="0.0" />
<parameter name="PACKAGE_DESKEW" value="false" />
<parameter name="PARSE_FRIENDLY_DEVICE_FAMILY_PARAM" value="" />
<parameter name="PARSE_FRIENDLY_DEVICE_FAMILY_PARAM_VALID" value="false" />
<parameter name="PHY_CSR_CONNECTION" value="INTERNAL_JTAG" />
<parameter name="PHY_CSR_ENABLED" value="false" />
<parameter name="PHY_ONLY" value="false" />
<parameter name="PINGPONGPHY_EN" value="false" />
<parameter name="PLL_ADDR_CMD_CLK_DIV_PARAM" value="0" />
<parameter name="PLL_ADDR_CMD_CLK_FREQ_PARAM" value="0.0" />
<parameter name="PLL_ADDR_CMD_CLK_FREQ_SIM_STR_PARAM" value="" />
<parameter name="PLL_ADDR_CMD_CLK_MULT_PARAM" value="0" />
<parameter name="PLL_ADDR_CMD_CLK_PHASE_PS_PARAM" value="0" />
<parameter name="PLL_ADDR_CMD_CLK_PHASE_PS_SIM_STR_PARAM" value="" />
<parameter name="PLL_AFI_CLK_DIV_PARAM" value="0" />
<parameter name="PLL_AFI_CLK_FREQ_PARAM" value="0.0" />
<parameter name="PLL_AFI_CLK_FREQ_SIM_STR_PARAM" value="" />
<parameter name="PLL_AFI_CLK_MULT_PARAM" value="0" />
<parameter name="PLL_AFI_CLK_PHASE_PS_PARAM" value="0" />
<parameter name="PLL_AFI_CLK_PHASE_PS_SIM_STR_PARAM" value="" />
<parameter name="PLL_AFI_HALF_CLK_DIV_PARAM" value="0" />
<parameter name="PLL_AFI_HALF_CLK_FREQ_PARAM" value="0.0" />
<parameter name="PLL_AFI_HALF_CLK_FREQ_SIM_STR_PARAM" value="" />
<parameter name="PLL_AFI_HALF_CLK_MULT_PARAM" value="0" />
<parameter name="PLL_AFI_HALF_CLK_PHASE_PS_PARAM" value="0" />
<parameter name="PLL_AFI_HALF_CLK_PHASE_PS_SIM_STR_PARAM" value="" />
<parameter name="PLL_AFI_PHY_CLK_DIV_PARAM" value="0" />
<parameter name="PLL_AFI_PHY_CLK_FREQ_PARAM" value="0.0" />
<parameter name="PLL_AFI_PHY_CLK_FREQ_SIM_STR_PARAM" value="" />
<parameter name="PLL_AFI_PHY_CLK_MULT_PARAM" value="0" />
<parameter name="PLL_AFI_PHY_CLK_PHASE_PS_PARAM" value="0" />
<parameter name="PLL_AFI_PHY_CLK_PHASE_PS_SIM_STR_PARAM" value="" />
<parameter name="PLL_C2P_WRITE_CLK_DIV_PARAM" value="0" />
<parameter name="PLL_C2P_WRITE_CLK_FREQ_PARAM" value="0.0" />
<parameter name="PLL_C2P_WRITE_CLK_FREQ_SIM_STR_PARAM" value="" />
<parameter name="PLL_C2P_WRITE_CLK_MULT_PARAM" value="0" />
<parameter name="PLL_C2P_WRITE_CLK_PHASE_PS_PARAM" value="0" />
<parameter name="PLL_C2P_WRITE_CLK_PHASE_PS_SIM_STR_PARAM" value="" />
<parameter name="PLL_CLK_PARAM_VALID" value="false" />
<parameter name="PLL_CONFIG_CLK_DIV_PARAM" value="0" />
<parameter name="PLL_CONFIG_CLK_FREQ_PARAM" value="0.0" />
<parameter name="PLL_CONFIG_CLK_FREQ_SIM_STR_PARAM" value="" />
<parameter name="PLL_CONFIG_CLK_MULT_PARAM" value="0" />
<parameter name="PLL_CONFIG_CLK_PHASE_PS_PARAM" value="0" />
<parameter name="PLL_CONFIG_CLK_PHASE_PS_SIM_STR_PARAM" value="" />
<parameter name="PLL_DR_CLK_DIV_PARAM" value="0" />
<parameter name="PLL_DR_CLK_FREQ_PARAM" value="0.0" />
<parameter name="PLL_DR_CLK_FREQ_SIM_STR_PARAM" value="" />
<parameter name="PLL_DR_CLK_MULT_PARAM" value="0" />
<parameter name="PLL_DR_CLK_PHASE_PS_PARAM" value="0" />
<parameter name="PLL_DR_CLK_PHASE_PS_SIM_STR_PARAM" value="" />
<parameter name="PLL_HR_CLK_DIV_PARAM" value="0" />
<parameter name="PLL_HR_CLK_FREQ_PARAM" value="0.0" />
<parameter name="PLL_HR_CLK_FREQ_SIM_STR_PARAM" value="" />
<parameter name="PLL_HR_CLK_MULT_PARAM" value="0" />
<parameter name="PLL_HR_CLK_PHASE_PS_PARAM" value="0" />
<parameter name="PLL_HR_CLK_PHASE_PS_SIM_STR_PARAM" value="" />
<parameter name="PLL_LOCATION" value="Top_Bottom" />
<parameter name="PLL_MEM_CLK_DIV_PARAM" value="0" />
<parameter name="PLL_MEM_CLK_FREQ_PARAM" value="0.0" />
<parameter name="PLL_MEM_CLK_FREQ_SIM_STR_PARAM" value="" />
<parameter name="PLL_MEM_CLK_MULT_PARAM" value="0" />
<parameter name="PLL_MEM_CLK_PHASE_PS_PARAM" value="0" />
<parameter name="PLL_MEM_CLK_PHASE_PS_SIM_STR_PARAM" value="" />
<parameter name="PLL_NIOS_CLK_DIV_PARAM" value="0" />
<parameter name="PLL_NIOS_CLK_FREQ_PARAM" value="0.0" />
<parameter name="PLL_NIOS_CLK_FREQ_SIM_STR_PARAM" value="" />
<parameter name="PLL_NIOS_CLK_MULT_PARAM" value="0" />
<parameter name="PLL_NIOS_CLK_PHASE_PS_PARAM" value="0" />
<parameter name="PLL_NIOS_CLK_PHASE_PS_SIM_STR_PARAM" value="" />
<parameter name="PLL_P2C_READ_CLK_DIV_PARAM" value="0" />
<parameter name="PLL_P2C_READ_CLK_FREQ_PARAM" value="0.0" />
<parameter name="PLL_P2C_READ_CLK_FREQ_SIM_STR_PARAM" value="" />
<parameter name="PLL_P2C_READ_CLK_MULT_PARAM" value="0" />
<parameter name="PLL_P2C_READ_CLK_PHASE_PS_PARAM" value="0" />
<parameter name="PLL_P2C_READ_CLK_PHASE_PS_SIM_STR_PARAM" value="" />
<parameter name="PLL_SHARING_MODE" value="None" />
<parameter name="PLL_WRITE_CLK_DIV_PARAM" value="0" />
<parameter name="PLL_WRITE_CLK_FREQ_PARAM" value="0.0" />
<parameter name="PLL_WRITE_CLK_FREQ_SIM_STR_PARAM" value="" />
<parameter name="PLL_WRITE_CLK_MULT_PARAM" value="0" />
<parameter name="PLL_WRITE_CLK_PHASE_PS_PARAM" value="0" />
<parameter name="PLL_WRITE_CLK_PHASE_PS_SIM_STR_PARAM" value="" />
<parameter name="POWER_OF_TWO_BUS" value="false" />
<parameter name="PRIORITY_PORT" value="1,1,1,1,1,1" />
<parameter name="QSPI_Mode" value="N/A" />
<parameter name="QSPI_PinMuxing" value="Unused" />
<parameter name="RATE" value="Full" />
<parameter name="RDIMM_CONFIG" value="0000000000000000" />
<parameter name="READ_DQ_DQS_CLOCK_SOURCE" value="INVERTED_DQS_BUS" />
<parameter name="READ_FIFO_SIZE" value="8" />
<parameter name="REFRESH_BURST_VALIDATION" value="false" />
<parameter name="REFRESH_INTERVAL" value="15000" />
<parameter name="REF_CLK_FREQ" value="25.0" />
<parameter name="REF_CLK_FREQ_MAX_PARAM" value="0.0" />
<parameter name="REF_CLK_FREQ_MIN_PARAM" value="0.0" />
<parameter name="REF_CLK_FREQ_PARAM_VALID" value="false" />
<parameter name="S2FCLK_COLDRST_Enable" value="false" />
<parameter name="S2FCLK_PENDINGRST_Enable" value="false" />
<parameter name="S2FCLK_USER0CLK_Enable" value="false" />
<parameter name="S2FCLK_USER1CLK_Enable" value="false" />
<parameter name="S2FCLK_USER1CLK_FREQ" value="100.0" />
<parameter name="S2FCLK_USER2CLK" value="1" />
<parameter name="S2FCLK_USER2CLK_Enable" value="false" />
<parameter name="S2FCLK_USER2CLK_FREQ" value="100.0" />
<parameter name="S2FINTERRUPT_CAN_Enable" value="false" />
<parameter name="S2FINTERRUPT_CLOCKPERIPHERAL_Enable" value="false" />
<parameter name="S2FINTERRUPT_CTI_Enable" value="false" />
<parameter name="S2FINTERRUPT_DMA_Enable" value="false" />
<parameter name="S2FINTERRUPT_EMAC_Enable" value="false" />
<parameter name="S2FINTERRUPT_FPGAMANAGER_Enable" value="false" />
<parameter name="S2FINTERRUPT_GPIO_Enable" value="false" />
<parameter name="S2FINTERRUPT_I2CEMAC_Enable" value="false" />
<parameter name="S2FINTERRUPT_I2CPERIPHERAL_Enable" value="false" />
<parameter name="S2FINTERRUPT_L4TIMER_Enable" value="false" />
<parameter name="S2FINTERRUPT_NAND_Enable" value="false" />
<parameter name="S2FINTERRUPT_OSCTIMER_Enable" value="false" />
<parameter name="S2FINTERRUPT_QSPI_Enable" value="false" />
<parameter name="S2FINTERRUPT_SDMMC_Enable" value="false" />
<parameter name="S2FINTERRUPT_SPIMASTER_Enable" value="false" />
<parameter name="S2FINTERRUPT_SPISLAVE_Enable" value="false" />
<parameter name="S2FINTERRUPT_UART_Enable" value="false" />
<parameter name="S2FINTERRUPT_USB_Enable" value="false" />
<parameter name="S2FINTERRUPT_WATCHDOG_Enable" value="false" />
<parameter name="S2F_Width" value="0" />
<parameter name="SDIO_Mode" value="N/A" />
<parameter name="SDIO_PinMuxing" value="Unused" />
<parameter name="SEQUENCER_TYPE" value="NIOS" />
<parameter name="SEQ_MODE" value="0" />
<parameter name="SKIP_MEM_INIT" value="true" />
<parameter name="SOPC_COMPAT_RESET" value="false" />
<parameter name="SPEED_GRADE" value="7" />
<parameter name="SPIM0_Mode" value="N/A" />
<parameter name="SPIM0_PinMuxing" value="Unused" />
<parameter name="SPIM1_Mode" value="N/A" />
<parameter name="SPIM1_PinMuxing" value="Unused" />
<parameter name="SPIS0_Mode" value="N/A" />
<parameter name="SPIS0_PinMuxing" value="Unused" />
<parameter name="SPIS1_Mode" value="N/A" />
<parameter name="SPIS1_PinMuxing" value="Unused" />
<parameter name="STARVE_LIMIT" value="10" />
<parameter name="STM_Enable" value="false" />
<parameter name="SYS_INFO_DEVICE_FAMILY" value="Cyclone V" />
<parameter name="TEST_Enable" value="false" />
<parameter name="TIMING_BOARD_AC_EYE_REDUCTION_H" value="0.0" />
<parameter name="TIMING_BOARD_AC_EYE_REDUCTION_SU" value="0.0" />
<parameter name="TIMING_BOARD_AC_SKEW" value="0.02" />
<parameter name="TIMING_BOARD_AC_SLEW_RATE" value="1.0" />
<parameter name="TIMING_BOARD_AC_TO_CK_SKEW" value="0.0" />
<parameter name="TIMING_BOARD_CK_CKN_SLEW_RATE" value="2.0" />
<parameter name="TIMING_BOARD_DELTA_DQS_ARRIVAL_TIME" value="0.0" />
<parameter name="TIMING_BOARD_DELTA_READ_DQS_ARRIVAL_TIME" value="0.0" />
<parameter name="TIMING_BOARD_DERATE_METHOD" value="AUTO" />
<parameter name="TIMING_BOARD_DQS_DQSN_SLEW_RATE" value="2.0" />
<parameter name="TIMING_BOARD_DQ_EYE_REDUCTION" value="0.0" />
<parameter name="TIMING_BOARD_DQ_SLEW_RATE" value="1.0" />
<parameter name="TIMING_BOARD_DQ_TO_DQS_SKEW" value="0.0" />
<parameter name="TIMING_BOARD_ISI_METHOD" value="AUTO" />
<parameter name="TIMING_BOARD_MAX_CK_DELAY" value="0.6" />
<parameter name="TIMING_BOARD_MAX_DQS_DELAY" value="0.6" />
<parameter name="TIMING_BOARD_READ_DQ_EYE_REDUCTION" value="0.0" />
<parameter name="TIMING_BOARD_SKEW_BETWEEN_DIMMS" value="0.05" />
<parameter name="TIMING_BOARD_SKEW_BETWEEN_DQS" value="0.02" />
<parameter name="TIMING_BOARD_SKEW_CKDQS_DIMM_MAX" value="0.01" />
<parameter name="TIMING_BOARD_SKEW_CKDQS_DIMM_MIN" value="-0.01" />
<parameter name="TIMING_BOARD_SKEW_WITHIN_DQS" value="0.02" />
<parameter name="TIMING_BOARD_TDH" value="0.0" />
<parameter name="TIMING_BOARD_TDS" value="0.0" />
<parameter name="TIMING_BOARD_TIH" value="0.0" />
<parameter name="TIMING_BOARD_TIS" value="0.0" />
<parameter name="TIMING_TDH" value="125" />
<parameter name="TIMING_TDQSCK" value="400" />
<parameter name="TIMING_TDQSCKDL" value="1200" />
<parameter name="TIMING_TDQSCKDM" value="900" />
<parameter name="TIMING_TDQSCKDS" value="450" />
<parameter name="TIMING_TDQSH" value="0.35" />
<parameter name="TIMING_TDQSQ" value="120" />
<parameter name="TIMING_TDQSS" value="0.25" />
<parameter name="TIMING_TDS" value="50" />
<parameter name="TIMING_TDSH" value="0.2" />
<parameter name="TIMING_TDSS" value="0.2" />
<parameter name="TIMING_TIH" value="250" />
<parameter name="TIMING_TIS" value="175" />
<parameter name="TIMING_TQH" value="0.38" />
<parameter name="TIMING_TQHS" value="300" />
<parameter name="TIMING_TQSH" value="0.38" />
<parameter name="TPIUFPGA_Enable" value="false" />
<parameter name="TPIUFPGA_alt" value="false" />
<parameter name="TRACE_Mode" value="N/A" />
<parameter name="TRACE_PinMuxing" value="Unused" />
<parameter name="TRACKING_ERROR_TEST" value="false" />
<parameter name="TRACKING_WATCH_TEST" value="false" />
<parameter name="TREFI" value="35100" />
<parameter name="TRFC" value="350" />
<parameter name="UART0_Mode" value="N/A" />
<parameter name="UART0_PinMuxing" value="Unused" />
<parameter name="UART1_Mode" value="N/A" />
<parameter name="UART1_PinMuxing" value="Unused" />
<parameter name="USB0_Mode" value="N/A" />
<parameter name="USB0_PinMuxing" value="Unused" />
<parameter name="USB1_Mode" value="N/A" />
<parameter name="USB1_PinMuxing" value="Unused" />
<parameter name="USER_DEBUG_LEVEL" value="1" />
<parameter name="USE_AXI_ADAPTOR" value="false" />
<parameter name="USE_FAKE_PHY" value="false" />
<parameter name="USE_MEM_CLK_FREQ" value="false" />
<parameter name="USE_MM_ADAPTOR" value="true" />
<parameter name="USE_SEQUENCER_BFM" value="false" />
<parameter name="WEIGHT_PORT" value="0,0,0,0,0,0" />
<parameter name="WRBUFFER_ADDR_WIDTH" value="6" />
<parameter name="can0_clk_div" value="1" />
<parameter name="can1_clk_div" value="1" />
<parameter name="configure_advanced_parameters" value="false" />
<parameter name="customize_device_pll_info" value="false" />
<parameter name="dbctrl_stayosc1" value="true" />
<parameter name="dbg_at_clk_div" value="0" />
<parameter name="dbg_clk_div" value="1" />
<parameter name="dbg_trace_clk_div" value="0" />
<parameter name="desired_can0_clk_mhz" value="100.0" />
<parameter name="desired_can1_clk_mhz" value="100.0" />
<parameter name="desired_cfg_clk_mhz" value="100.0" />
<parameter name="desired_emac0_clk_mhz" value="250.0" />
<parameter name="desired_emac1_clk_mhz" value="250.0" />
<parameter name="desired_gpio_db_clk_hz" value="32000" />
<parameter name="desired_l4_mp_clk_mhz" value="100.0" />
<parameter name="desired_l4_sp_clk_mhz" value="100.0" />
<parameter name="desired_mpu_clk_mhz" value="800.0" />
<parameter name="desired_nand_clk_mhz" value="12.5" />
<parameter name="desired_qspi_clk_mhz" value="400.0" />
<parameter name="desired_sdmmc_clk_mhz" value="200.0" />
<parameter name="desired_spi_m_clk_mhz" value="200.0" />
<parameter name="desired_usb_mp_clk_mhz" value="200.0" />
<parameter name="device_name" value="5CSEMA4U23C6" />
<parameter name="device_pll_info_manual">{320000000 1600000000} {320000000 1000000000} {800000000 400000000 400000000}</parameter>
<parameter name="eosc1_clk_mhz" value="25.0" />
<parameter name="eosc2_clk_mhz" value="25.0" />
<parameter name="gpio_db_clk_div" value="6249" />
<parameter name="l3_mp_clk_div" value="1" />
<parameter name="l3_sp_clk_div" value="1" />
<parameter name="l4_mp_clk_div" value="1" />
<parameter name="l4_mp_clk_source" value="1" />
<parameter name="l4_sp_clk_div" value="1" />
<parameter name="l4_sp_clk_source" value="1" />
<parameter name="main_pll_c3" value="3" />
<parameter name="main_pll_c4" value="3" />
<parameter name="main_pll_c5" value="15" />
<parameter name="main_pll_m" value="63" />
<parameter name="main_pll_n" value="0" />
<parameter name="nand_clk_source" value="2" />
<parameter name="periph_pll_c0" value="3" />
<parameter name="periph_pll_c1" value="3" />
<parameter name="periph_pll_c2" value="1" />
<parameter name="periph_pll_c3" value="19" />
<parameter name="periph_pll_c4" value="4" />
<parameter name="periph_pll_c5" value="9" />
<parameter name="periph_pll_m" value="79" />
<parameter name="periph_pll_n" value="1" />
<parameter name="periph_pll_source" value="0" />
<parameter name="qspi_clk_source" value="1" />
<parameter name="quartus_ini_hps_emif_pll" value="false" />
<parameter
name="quartus_ini_hps_ip_enable_all_peripheral_fpga_interfaces"
value="false" />
<parameter name="quartus_ini_hps_ip_enable_bsel_csel" value="false" />
<parameter
name="quartus_ini_hps_ip_enable_emac0_peripheral_fpga_interface"
value="false" />
<parameter
name="quartus_ini_hps_ip_enable_low_speed_serial_fpga_interfaces"
value="false" />
<parameter name="quartus_ini_hps_ip_enable_test_interface" value="false" />
<parameter name="quartus_ini_hps_ip_f2sdram_bonding_out" value="false" />
<parameter name="quartus_ini_hps_ip_fast_f2sdram_sim_model" value="false" />
<parameter name="quartus_ini_hps_ip_suppress_sdram_synth" value="false" />
<parameter name="sdmmc_clk_source" value="2" />
<parameter name="show_advanced_parameters" value="false" />
<parameter name="show_debug_info_as_warning_msg" value="false" />
<parameter name="show_warning_as_error_msg" value="false" />
<parameter name="spi_m_clk_div" value="0" />
<parameter name="usb_mp_clk_div" value="0" />
<parameter name="use_default_mpu_clk" value="true" />
</module>
<interconnectRequirement for="$system" name="qsys_mm.clockCrossingAdapter" value="HANDSHAKE" />
<interconnectRequirement for="$system" name="qsys_mm.enableEccProtection" value="FALSE" />
<interconnectRequirement for="$system" name="qsys_mm.insertDefaultSlave" value="FALSE" />
<interconnectRequirement for="$system" name="qsys_mm.maxAdditionalLatency" value="1" />
</system>