89 lines
1.7 KiB
VHDL
89 lines
1.7 KiB
VHDL
library ieee;
|
|
use ieee.std_logic_1164.all;
|
|
use ieee.numeric_std.all;
|
|
|
|
entity WS28XX is
|
|
port(
|
|
clk:in std_logic;
|
|
nReset:in std_logic;
|
|
|
|
--Internalinterface(i.e.Avalonslave).
|
|
address:in std_logic;
|
|
write:in std_logic;
|
|
writedata:in std_logic_vector(31 downto 0);
|
|
|
|
--Externalinterface(i.e.conduit).
|
|
lout:out std_logic
|
|
);
|
|
|
|
end WS28XX;
|
|
|
|
|
|
architecture comp of WS28XX is
|
|
|
|
signal led_i : std_logic_vector(7 downto 0);
|
|
signal led_v : std_logic_vector(23 downto 0);
|
|
signal led_wr : std_logic;
|
|
|
|
signal led_n : std_logic_vector(7 downto 0);
|
|
signal led_n_wr : std_logic;
|
|
|
|
signal ready : std_logic;
|
|
begin
|
|
|
|
--WSDriver.
|
|
l0 : entity work.WSDriver
|
|
generic map (
|
|
F_CLK => 50000000,
|
|
N_LED_MAX => 255
|
|
)
|
|
port map (
|
|
clk => clk,
|
|
rst_n => nReset,
|
|
|
|
-- LED address and LED value
|
|
led_wr_in => led_wr,
|
|
led_in => led_v,
|
|
addr_in => led_i,
|
|
|
|
-- Write-enable & value of N bits to keep active
|
|
n_wr_in => led_n_wr,
|
|
n_in => led_n,
|
|
|
|
-- Output 1-bit line for WS2812 strip
|
|
ws_out => lout,
|
|
|
|
-- Low while shifting LED values
|
|
ready_out => ready
|
|
);
|
|
|
|
|
|
led_i <= writedata(31 downto 24);
|
|
led_v <= writedata(23 downto 0);
|
|
led_n <= writedata(7 downto 0);
|
|
|
|
--Avalon slave - write to registers.
|
|
process(write,address,nReset)
|
|
begin
|
|
if nReset = '0' then
|
|
led_wr <= '0';
|
|
led_n_wr <= '0';
|
|
else
|
|
led_wr <= '0';
|
|
led_n_wr <= '0';
|
|
|
|
if write = '1' then
|
|
case address is
|
|
when '0' =>
|
|
led_wr <= '1';
|
|
when '1' =>
|
|
led_n_wr <= '1';
|
|
when others =>
|
|
null;
|
|
end case;
|
|
end if;
|
|
end if;
|
|
end process;
|
|
|
|
|
|
end comp; |