2022-04-07 18:43:21 +02:00

47 lines
40 KiB
Plaintext
Executable File

{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Design Software" 0 -1 1543265857431 ""}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus Prime " "Running Quartus Prime Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 18.0.0 Build 614 04/24/2018 SJ Lite Edition " "Version 18.0.0 Build 614 04/24/2018 SJ Lite Edition" { } { } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1543265857431 ""} { "Info" "IQEXE_START_BANNER_TIME" "Mon Nov 26 21:57:37 2018 " "Processing started: Mon Nov 26 21:57:37 2018" { } { } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1543265857431 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1543265857431 ""}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off GECKO -c GECKO " "Command: quartus_map --read_settings_files=on --write_settings_files=off GECKO -c GECKO" { } { } 0 0 "Command: %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1543265857431 ""}
{ "Warning" "WQCU_PARALLEL_USER_SHOULD_SPECIFY_NUM_PROC" "" "Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." { } { } 0 18236 "Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." 0 0 "Analysis & Synthesis" 0 -1 1543265858574 ""}
{ "Info" "IQCU_PARALLEL_AUTODETECT_MULTIPLE_PROCESSORS" "4 4 " "Parallel compilation is enabled and will use 4 of the 4 processors detected" { } { } 0 20030 "Parallel compilation is enabled and will use %1!i! of the %2!i! processors detected" 0 0 "Analysis & Synthesis" 0 -1 1543265858574 ""}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "decoder-decoder_0.qxp 1 1 " "Found 1 design units, including 1 entities, in source file decoder-decoder_0.qxp" { { "Info" "ISGN_ENTITY_NAME" "1 decoder " "Found entity 1: decoder" { } { { "decoder-decoder_0.qxp" "" { Text "F:/kkk/quartus/decoder-decoder_0.qxp" -1 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1543265869509 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1543265869509 ""}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "cpu-inst.qxp 1 1 " "Found 1 design units, including 1 entities, in source file cpu-inst.qxp" { { "Info" "ISGN_ENTITY_NAME" "1 CPU " "Found entity 1: CPU" { } { { "CPU-inst.qxp" "" { Text "F:/kkk/quartus/CPU-inst.qxp" -1 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1543265870134 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1543265870134 ""}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "gecko.bdf 1 1 " "Found 1 design units, including 1 entities, in source file gecko.bdf" { { "Info" "ISGN_ENTITY_NAME" "1 GECKO " "Found entity 1: GECKO" { } { { "GECKO.bdf" "" { Schematic "F:/kkk/quartus/GECKO.bdf" { } } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1543265870290 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1543265870290 ""}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "/kkk/vhdl/buttons.vhd 2 1 " "Found 2 design units, including 1 entities, in source file /kkk/vhdl/buttons.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 buttons-synth " "Found design unit 1: buttons-synth" { } { { "../vhdl/buttons.vhd" "" { Text "F:/kkk/vhdl/buttons.vhd" 22 -1 0 } } } 0 12022 "Found design unit %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1543265870900 ""} { "Info" "ISGN_ENTITY_NAME" "1 buttons " "Found entity 1: buttons" { } { { "../vhdl/buttons.vhd" "" { Text "F:/kkk/vhdl/buttons.vhd" 5 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1543265870900 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1543265870900 ""}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "/kkk/vhdl/leds.vhd 2 1 " "Found 2 design units, including 1 entities, in source file /kkk/vhdl/leds.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 LEDs-synth " "Found design unit 1: LEDs-synth" { } { { "../vhdl/LEDs.vhd" "" { Text "F:/kkk/vhdl/LEDs.vhd" 22 -1 0 } } } 0 12022 "Found design unit %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1543265870931 ""} { "Info" "ISGN_ENTITY_NAME" "1 LEDs " "Found entity 1: LEDs" { } { { "../vhdl/LEDs.vhd" "" { Text "F:/kkk/vhdl/LEDs.vhd" 5 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1543265870931 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1543265870931 ""}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "/kkk/vhdl/ram.vhd 2 1 " "Found 2 design units, including 1 entities, in source file /kkk/vhdl/ram.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 RAM-synth " "Found design unit 1: RAM-synth" { } { { "../vhdl/RAM.vhd" "" { Text "F:/kkk/vhdl/RAM.vhd" 1 -1 0 } } } 0 12022 "Found design unit %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1543265870946 ""} { "Info" "ISGN_ENTITY_NAME" "1 RAM " "Found entity 1: RAM" { } { { "../vhdl/RAM.vhd" "" { Text "F:/kkk/vhdl/RAM.vhd" 1 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1543265870946 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1543265870946 ""}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "/kkk/vhdl/rom.vhd 2 1 " "Found 2 design units, including 1 entities, in source file /kkk/vhdl/rom.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 ROM-synth " "Found design unit 1: ROM-synth" { } { { "../vhdl/ROM.vhd" "" { Text "F:/kkk/vhdl/ROM.vhd" 1 -1 0 } } } 0 12022 "Found design unit %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1543265871087 ""} { "Info" "ISGN_ENTITY_NAME" "1 ROM " "Found entity 1: ROM" { } { { "../vhdl/ROM.vhd" "" { Text "F:/kkk/vhdl/ROM.vhd" 1 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1543265871087 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1543265871087 ""}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "/kkk/vhdl/rom_block.vhd 2 1 " "Found 2 design units, including 1 entities, in source file /kkk/vhdl/rom_block.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 rom_block-SYN " "Found design unit 1: rom_block-SYN" { } { { "../vhdl/ROM_Block.vhd" "" { Text "F:/kkk/vhdl/ROM_Block.vhd" 52 -1 0 } } } 0 12022 "Found design unit %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1543265871103 ""} { "Info" "ISGN_ENTITY_NAME" "1 ROM_Block " "Found entity 1: ROM_Block" { } { { "../vhdl/ROM_Block.vhd" "" { Text "F:/kkk/vhdl/ROM_Block.vhd" 42 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1543265871103 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1543265871103 ""}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "/kkk/vhdl/ram_obfuscated.vhd 2 1 " "Found 2 design units, including 1 entities, in source file /kkk/vhdl/ram_obfuscated.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 iD_s_B88A4C5_7e3415fF_E-ID_s_10643F3B_2fc543eB_E " "Found design unit 1: iD_s_B88A4C5_7e3415fF_E-ID_s_10643F3B_2fc543eB_E" { } { { "../vhdl/RAM_obfuscated.vhd" "" { Text "F:/kkk/vhdl/RAM_obfuscated.vhd" 1 -1 0 } } } 0 12022 "Found design unit %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1543265871290 ""} { "Info" "ISGN_ENTITY_NAME" "1 ID_S_B88a4C5_7E3415Ff_e " "Found entity 1: ID_S_B88a4C5_7E3415Ff_e" { } { { "../vhdl/RAM_obfuscated.vhd" "" { Text "F:/kkk/vhdl/RAM_obfuscated.vhd" 1 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1543265871290 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1543265871290 ""}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "/kkk/vhdl/rom_obfuscated.vhd 2 1 " "Found 2 design units, including 1 entities, in source file /kkk/vhdl/rom_obfuscated.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 id_s_B88a693_7E3412f0_E-id_s_455b727d_1f58D85f_e " "Found design unit 1: id_s_B88a693_7E3412f0_E-id_s_455b727d_1f58D85f_e" { } { { "../vhdl/ROM_obfuscated.vhd" "" { Text "F:/kkk/vhdl/ROM_obfuscated.vhd" 1 -1 0 } } } 0 12022 "Found design unit %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1543265871446 ""} { "Info" "ISGN_ENTITY_NAME" "1 iD_S_b88a693_7e3412F0_e " "Found entity 1: iD_S_b88a693_7e3412F0_e" { } { { "../vhdl/ROM_obfuscated.vhd" "" { Text "F:/kkk/vhdl/ROM_obfuscated.vhd" 1 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1543265871446 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1543265871446 ""}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "/kkk/vhdl/seven_seg.vhd 2 1 " "Found 2 design units, including 1 entities, in source file /kkk/vhdl/seven_seg.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 seven_seg-rtl " "Found design unit 1: seven_seg-rtl" { } { { "../vhdl/seven_seg.vhd" "" { Text "F:/kkk/vhdl/seven_seg.vhd" 12 -1 0 } } } 0 12022 "Found design unit %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1543265871603 ""} { "Info" "ISGN_ENTITY_NAME" "1 seven_seg " "Found entity 1: seven_seg" { } { { "../vhdl/seven_seg.vhd" "" { Text "F:/kkk/vhdl/seven_seg.vhd" 4 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1543265871603 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1543265871603 ""}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "/kkk/vhdl/randgen.vhd 2 1 " "Found 2 design units, including 1 entities, in source file /kkk/vhdl/randgen.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 randgen-rtl " "Found design unit 1: randgen-rtl" { } { { "../vhdl/randgen.vhd" "" { Text "F:/kkk/vhdl/randgen.vhd" 13 -1 0 } } } 0 12022 "Found design unit %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1543265871618 ""} { "Info" "ISGN_ENTITY_NAME" "1 randgen " "Found entity 1: randgen" { } { { "../vhdl/randgen.vhd" "" { Text "F:/kkk/vhdl/randgen.vhd" 5 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1543265871618 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1543265871618 ""}
{ "Info" "ISGN_START_ELABORATION_TOP" "GECKO " "Elaborating entity \"GECKO\" for the top level hierarchy" { } { } 0 12127 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0 "Analysis & Synthesis" 0 -1 1543265871962 ""}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "LEDs LEDs:LEDs_0 " "Elaborating entity \"LEDs\" for hierarchy \"LEDs:LEDs_0\"" { } { { "GECKO.bdf" "LEDs_0" { Schematic "F:/kkk/quartus/GECKO.bdf" { { 160 1040 1176 336 "LEDs_0" "" } } } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1543265872150 ""}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "decoder decoder:decoder_0 " "Elaborating entity \"decoder\" for hierarchy \"decoder:decoder_0\"" { } { { "GECKO.bdf" "decoder_0" { Schematic "F:/kkk/quartus/GECKO.bdf" { { 96 408 544 232 "decoder_0" "" } } } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1543265872306 ""}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "CPU CPU:inst " "Elaborating entity \"CPU\" for hierarchy \"CPU:inst\"" { } { { "GECKO.bdf" "inst" { Schematic "F:/kkk/quartus/GECKO.bdf" { { 328 168 376 456 "inst" "" } } } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1543265872571 ""}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "ROM ROM:ROM_0 " "Elaborating entity \"ROM\" for hierarchy \"ROM:ROM_0\"" { } { { "GECKO.bdf" "ROM_0" { Schematic "F:/kkk/quartus/GECKO.bdf" { { 176 616 736 296 "ROM_0" "" } } } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1543265872993 ""}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "iD_S_b88a693_7e3412F0_e ROM:ROM_0\|iD_S_b88a693_7e3412F0_e:ROM_inst " "Elaborating entity \"iD_S_b88a693_7e3412F0_e\" for hierarchy \"ROM:ROM_0\|iD_S_b88a693_7e3412F0_e:ROM_inst\"" { } { { "../vhdl/ROM.vhd" "ROM_inst" { Text "F:/kkk/vhdl/ROM.vhd" 1 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1543265873009 ""}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "ROM_Block ROM:ROM_0\|iD_S_b88a693_7e3412F0_e:ROM_inst\|ROM_Block:iD_s_30739CAe_5A20DAf5_E " "Elaborating entity \"ROM_Block\" for hierarchy \"ROM:ROM_0\|iD_S_b88a693_7e3412F0_e:ROM_inst\|ROM_Block:iD_s_30739CAe_5A20DAf5_E\"" { } { { "../vhdl/ROM_obfuscated.vhd" "iD_s_30739CAe_5A20DAf5_E" { Text "F:/kkk/vhdl/ROM_obfuscated.vhd" 1 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1543265873009 ""}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram ROM:ROM_0\|iD_S_b88a693_7e3412F0_e:ROM_inst\|ROM_Block:iD_s_30739CAe_5A20DAf5_E\|altsyncram:altsyncram_component " "Elaborating entity \"altsyncram\" for hierarchy \"ROM:ROM_0\|iD_S_b88a693_7e3412F0_e:ROM_inst\|ROM_Block:iD_s_30739CAe_5A20DAf5_E\|altsyncram:altsyncram_component\"" { } { { "../vhdl/ROM_Block.vhd" "altsyncram_component" { Text "F:/kkk/vhdl/ROM_Block.vhd" 85 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1543265873228 ""}
{ "Info" "ISGN_ELABORATION_HEADER" "ROM:ROM_0\|iD_S_b88a693_7e3412F0_e:ROM_inst\|ROM_Block:iD_s_30739CAe_5A20DAf5_E\|altsyncram:altsyncram_component " "Elaborated megafunction instantiation \"ROM:ROM_0\|iD_S_b88a693_7e3412F0_e:ROM_inst\|ROM_Block:iD_s_30739CAe_5A20DAf5_E\|altsyncram:altsyncram_component\"" { } { { "../vhdl/ROM_Block.vhd" "" { Text "F:/kkk/vhdl/ROM_Block.vhd" 85 0 0 } } } 0 12130 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1543265873259 ""}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "ROM:ROM_0\|iD_S_b88a693_7e3412F0_e:ROM_inst\|ROM_Block:iD_s_30739CAe_5A20DAf5_E\|altsyncram:altsyncram_component " "Instantiated megafunction \"ROM:ROM_0\|iD_S_b88a693_7e3412F0_e:ROM_inst\|ROM_Block:iD_s_30739CAe_5A20DAf5_E\|altsyncram:altsyncram_component\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "address_aclr_a NONE " "Parameter \"address_aclr_a\" = \"NONE\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1543265873259 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "clock_enable_input_a BYPASS " "Parameter \"clock_enable_input_a\" = \"BYPASS\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1543265873259 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "clock_enable_output_a BYPASS " "Parameter \"clock_enable_output_a\" = \"BYPASS\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1543265873259 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "init_file ../quartus/ROM.hex " "Parameter \"init_file\" = \"../quartus/ROM.hex\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1543265873259 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "intended_device_family Cyclone IV E " "Parameter \"intended_device_family\" = \"Cyclone IV E\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1543265873259 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_hint ENABLE_RUNTIME_MOD=NO " "Parameter \"lpm_hint\" = \"ENABLE_RUNTIME_MOD=NO\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1543265873259 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_type altsyncram " "Parameter \"lpm_type\" = \"altsyncram\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1543265873259 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "numwords_a 1024 " "Parameter \"numwords_a\" = \"1024\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1543265873259 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "operation_mode ROM " "Parameter \"operation_mode\" = \"ROM\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1543265873259 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "outdata_aclr_a NONE " "Parameter \"outdata_aclr_a\" = \"NONE\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1543265873259 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "outdata_reg_a UNREGISTERED " "Parameter \"outdata_reg_a\" = \"UNREGISTERED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1543265873259 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "widthad_a 10 " "Parameter \"widthad_a\" = \"10\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1543265873259 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "width_a 32 " "Parameter \"width_a\" = \"32\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1543265873259 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "width_byteena_a 1 " "Parameter \"width_byteena_a\" = \"1\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1543265873259 ""} } { { "../vhdl/ROM_Block.vhd" "" { Text "F:/kkk/vhdl/ROM_Block.vhd" 85 0 0 } } } 0 12133 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "Analysis & Synthesis" 0 -1 1543265873259 ""}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/altsyncram_rna1.tdf 1 1 " "Found 1 design units, including 1 entities, in source file db/altsyncram_rna1.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram_rna1 " "Found entity 1: altsyncram_rna1" { } { { "db/altsyncram_rna1.tdf" "" { Text "F:/kkk/quartus/db/altsyncram_rna1.tdf" 27 1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1543265873353 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1543265873353 ""}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram_rna1 ROM:ROM_0\|iD_S_b88a693_7e3412F0_e:ROM_inst\|ROM_Block:iD_s_30739CAe_5A20DAf5_E\|altsyncram:altsyncram_component\|altsyncram_rna1:auto_generated " "Elaborating entity \"altsyncram_rna1\" for hierarchy \"ROM:ROM_0\|iD_S_b88a693_7e3412F0_e:ROM_inst\|ROM_Block:iD_s_30739CAe_5A20DAf5_E\|altsyncram:altsyncram_component\|altsyncram_rna1:auto_generated\"" { } { { "altsyncram.tdf" "auto_generated" { Text "c:/intelfpga_lite/18.0/quartus/libraries/megafunctions/altsyncram.tdf" 791 4 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1543265873368 ""}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "RAM RAM:RAM_0 " "Elaborating entity \"RAM\" for hierarchy \"RAM:RAM_0\"" { } { { "GECKO.bdf" "RAM_0" { Schematic "F:/kkk/quartus/GECKO.bdf" { { 176 816 960 296 "RAM_0" "" } } } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1543265873478 ""}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "ID_S_B88a4C5_7E3415Ff_e RAM:RAM_0\|ID_S_B88a4C5_7E3415Ff_e:ram_inst " "Elaborating entity \"ID_S_B88a4C5_7E3415Ff_e\" for hierarchy \"RAM:RAM_0\|ID_S_B88a4C5_7E3415Ff_e:ram_inst\"" { } { { "../vhdl/RAM.vhd" "ram_inst" { Text "F:/kkk/vhdl/RAM.vhd" 1 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1543265873587 ""}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "buttons buttons:inst2 " "Elaborating entity \"buttons\" for hierarchy \"buttons:inst2\"" { } { { "GECKO.bdf" "inst2" { Schematic "F:/kkk/quartus/GECKO.bdf" { { 144 1344 1544 320 "inst2" "" } } } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1543265873587 ""}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "randgen randgen:inst3 " "Elaborating entity \"randgen\" for hierarchy \"randgen:inst3\"" { } { { "GECKO.bdf" "inst3" { Schematic "F:/kkk/quartus/GECKO.bdf" { { 496 928 1136 608 "inst3" "" } } } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1543265873603 ""}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "seven_seg seven_seg:inst1 " "Elaborating entity \"seven_seg\" for hierarchy \"seven_seg:inst1\"" { } { { "GECKO.bdf" "inst1" { Schematic "F:/kkk/quartus/GECKO.bdf" { { 80 1608 1720 296 "inst1" "" } } } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1543265873618 ""}
{ "Warning" "WSGN_TIMING_DRIVEN_SYNTHESIS_IMPORTED_PARTITION" "" "Synthesis found one or more imported partitions that will be treated as black boxes for timing analysis during synthesis" { } { } 0 12240 "Synthesis found one or more imported partitions that will be treated as black boxes for timing analysis during synthesis" 0 0 "Analysis & Synthesis" 0 -1 1543265874493 ""}
{ "Warning" "WMLS_MLS_CONVERT_TRI_TO_OR_HDR" "" "Tri-state node(s) do not directly drive top-level pin(s)" { { "Warning" "WMLS_MLS_CONVERT_TRI_TO_SELECTOR" "\"rddata\[31\]\" " "Converted tri-state node \"rddata\[31\]\" into a selector" { } { { "GECKO.bdf" "" { Schematic "F:/kkk/quartus/GECKO.bdf" { { 328 168 376 456 "inst" "" } } } } } 0 13048 "Converted tri-state node %1!s! into a selector" 0 0 "Design Software" 0 -1 1543265874759 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_SELECTOR" "\"rddata\[30\]\" " "Converted tri-state node \"rddata\[30\]\" into a selector" { } { { "GECKO.bdf" "" { Schematic "F:/kkk/quartus/GECKO.bdf" { { 328 168 376 456 "inst" "" } } } } } 0 13048 "Converted tri-state node %1!s! into a selector" 0 0 "Design Software" 0 -1 1543265874759 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_SELECTOR" "\"rddata\[29\]\" " "Converted tri-state node \"rddata\[29\]\" into a selector" { } { { "GECKO.bdf" "" { Schematic "F:/kkk/quartus/GECKO.bdf" { { 328 168 376 456 "inst" "" } } } } } 0 13048 "Converted tri-state node %1!s! into a selector" 0 0 "Design Software" 0 -1 1543265874759 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_SELECTOR" "\"rddata\[28\]\" " "Converted tri-state node \"rddata\[28\]\" into a selector" { } { { "GECKO.bdf" "" { Schematic "F:/kkk/quartus/GECKO.bdf" { { 328 168 376 456 "inst" "" } } } } } 0 13048 "Converted tri-state node %1!s! into a selector" 0 0 "Design Software" 0 -1 1543265874759 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_SELECTOR" "\"rddata\[27\]\" " "Converted tri-state node \"rddata\[27\]\" into a selector" { } { { "GECKO.bdf" "" { Schematic "F:/kkk/quartus/GECKO.bdf" { { 328 168 376 456 "inst" "" } } } } } 0 13048 "Converted tri-state node %1!s! into a selector" 0 0 "Design Software" 0 -1 1543265874759 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_SELECTOR" "\"rddata\[26\]\" " "Converted tri-state node \"rddata\[26\]\" into a selector" { } { { "GECKO.bdf" "" { Schematic "F:/kkk/quartus/GECKO.bdf" { { 328 168 376 456 "inst" "" } } } } } 0 13048 "Converted tri-state node %1!s! into a selector" 0 0 "Design Software" 0 -1 1543265874759 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_SELECTOR" "\"rddata\[25\]\" " "Converted tri-state node \"rddata\[25\]\" into a selector" { } { { "GECKO.bdf" "" { Schematic "F:/kkk/quartus/GECKO.bdf" { { 328 168 376 456 "inst" "" } } } } } 0 13048 "Converted tri-state node %1!s! into a selector" 0 0 "Design Software" 0 -1 1543265874759 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_SELECTOR" "\"rddata\[24\]\" " "Converted tri-state node \"rddata\[24\]\" into a selector" { } { { "GECKO.bdf" "" { Schematic "F:/kkk/quartus/GECKO.bdf" { { 328 168 376 456 "inst" "" } } } } } 0 13048 "Converted tri-state node %1!s! into a selector" 0 0 "Design Software" 0 -1 1543265874759 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_SELECTOR" "\"rddata\[23\]\" " "Converted tri-state node \"rddata\[23\]\" into a selector" { } { { "GECKO.bdf" "" { Schematic "F:/kkk/quartus/GECKO.bdf" { { 328 168 376 456 "inst" "" } } } } } 0 13048 "Converted tri-state node %1!s! into a selector" 0 0 "Design Software" 0 -1 1543265874759 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_SELECTOR" "\"rddata\[22\]\" " "Converted tri-state node \"rddata\[22\]\" into a selector" { } { { "GECKO.bdf" "" { Schematic "F:/kkk/quartus/GECKO.bdf" { { 328 168 376 456 "inst" "" } } } } } 0 13048 "Converted tri-state node %1!s! into a selector" 0 0 "Design Software" 0 -1 1543265874759 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_SELECTOR" "\"rddata\[21\]\" " "Converted tri-state node \"rddata\[21\]\" into a selector" { } { { "GECKO.bdf" "" { Schematic "F:/kkk/quartus/GECKO.bdf" { { 328 168 376 456 "inst" "" } } } } } 0 13048 "Converted tri-state node %1!s! into a selector" 0 0 "Design Software" 0 -1 1543265874759 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_SELECTOR" "\"rddata\[20\]\" " "Converted tri-state node \"rddata\[20\]\" into a selector" { } { { "GECKO.bdf" "" { Schematic "F:/kkk/quartus/GECKO.bdf" { { 328 168 376 456 "inst" "" } } } } } 0 13048 "Converted tri-state node %1!s! into a selector" 0 0 "Design Software" 0 -1 1543265874759 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_SELECTOR" "\"rddata\[19\]\" " "Converted tri-state node \"rddata\[19\]\" into a selector" { } { { "GECKO.bdf" "" { Schematic "F:/kkk/quartus/GECKO.bdf" { { 328 168 376 456 "inst" "" } } } } } 0 13048 "Converted tri-state node %1!s! into a selector" 0 0 "Design Software" 0 -1 1543265874759 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_SELECTOR" "\"rddata\[18\]\" " "Converted tri-state node \"rddata\[18\]\" into a selector" { } { { "GECKO.bdf" "" { Schematic "F:/kkk/quartus/GECKO.bdf" { { 328 168 376 456 "inst" "" } } } } } 0 13048 "Converted tri-state node %1!s! into a selector" 0 0 "Design Software" 0 -1 1543265874759 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_SELECTOR" "\"rddata\[17\]\" " "Converted tri-state node \"rddata\[17\]\" into a selector" { } { { "GECKO.bdf" "" { Schematic "F:/kkk/quartus/GECKO.bdf" { { 328 168 376 456 "inst" "" } } } } } 0 13048 "Converted tri-state node %1!s! into a selector" 0 0 "Design Software" 0 -1 1543265874759 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_SELECTOR" "\"rddata\[16\]\" " "Converted tri-state node \"rddata\[16\]\" into a selector" { } { { "GECKO.bdf" "" { Schematic "F:/kkk/quartus/GECKO.bdf" { { 328 168 376 456 "inst" "" } } } } } 0 13048 "Converted tri-state node %1!s! into a selector" 0 0 "Design Software" 0 -1 1543265874759 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_SELECTOR" "\"rddata\[15\]\" " "Converted tri-state node \"rddata\[15\]\" into a selector" { } { { "GECKO.bdf" "" { Schematic "F:/kkk/quartus/GECKO.bdf" { { 328 168 376 456 "inst" "" } } } } } 0 13048 "Converted tri-state node %1!s! into a selector" 0 0 "Design Software" 0 -1 1543265874759 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_SELECTOR" "\"rddata\[14\]\" " "Converted tri-state node \"rddata\[14\]\" into a selector" { } { { "GECKO.bdf" "" { Schematic "F:/kkk/quartus/GECKO.bdf" { { 328 168 376 456 "inst" "" } } } } } 0 13048 "Converted tri-state node %1!s! into a selector" 0 0 "Design Software" 0 -1 1543265874759 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_SELECTOR" "\"rddata\[13\]\" " "Converted tri-state node \"rddata\[13\]\" into a selector" { } { { "GECKO.bdf" "" { Schematic "F:/kkk/quartus/GECKO.bdf" { { 328 168 376 456 "inst" "" } } } } } 0 13048 "Converted tri-state node %1!s! into a selector" 0 0 "Design Software" 0 -1 1543265874759 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_SELECTOR" "\"rddata\[12\]\" " "Converted tri-state node \"rddata\[12\]\" into a selector" { } { { "GECKO.bdf" "" { Schematic "F:/kkk/quartus/GECKO.bdf" { { 328 168 376 456 "inst" "" } } } } } 0 13048 "Converted tri-state node %1!s! into a selector" 0 0 "Design Software" 0 -1 1543265874759 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_SELECTOR" "\"rddata\[11\]\" " "Converted tri-state node \"rddata\[11\]\" into a selector" { } { { "GECKO.bdf" "" { Schematic "F:/kkk/quartus/GECKO.bdf" { { 328 168 376 456 "inst" "" } } } } } 0 13048 "Converted tri-state node %1!s! into a selector" 0 0 "Design Software" 0 -1 1543265874759 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_SELECTOR" "\"rddata\[10\]\" " "Converted tri-state node \"rddata\[10\]\" into a selector" { } { { "GECKO.bdf" "" { Schematic "F:/kkk/quartus/GECKO.bdf" { { 328 168 376 456 "inst" "" } } } } } 0 13048 "Converted tri-state node %1!s! into a selector" 0 0 "Design Software" 0 -1 1543265874759 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_SELECTOR" "\"rddata\[9\]\" " "Converted tri-state node \"rddata\[9\]\" into a selector" { } { { "GECKO.bdf" "" { Schematic "F:/kkk/quartus/GECKO.bdf" { { 328 168 376 456 "inst" "" } } } } } 0 13048 "Converted tri-state node %1!s! into a selector" 0 0 "Design Software" 0 -1 1543265874759 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_SELECTOR" "\"rddata\[8\]\" " "Converted tri-state node \"rddata\[8\]\" into a selector" { } { { "GECKO.bdf" "" { Schematic "F:/kkk/quartus/GECKO.bdf" { { 328 168 376 456 "inst" "" } } } } } 0 13048 "Converted tri-state node %1!s! into a selector" 0 0 "Design Software" 0 -1 1543265874759 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_SELECTOR" "\"rddata\[7\]\" " "Converted tri-state node \"rddata\[7\]\" into a selector" { } { { "GECKO.bdf" "" { Schematic "F:/kkk/quartus/GECKO.bdf" { { 328 168 376 456 "inst" "" } } } } } 0 13048 "Converted tri-state node %1!s! into a selector" 0 0 "Design Software" 0 -1 1543265874759 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_SELECTOR" "\"rddata\[6\]\" " "Converted tri-state node \"rddata\[6\]\" into a selector" { } { { "GECKO.bdf" "" { Schematic "F:/kkk/quartus/GECKO.bdf" { { 328 168 376 456 "inst" "" } } } } } 0 13048 "Converted tri-state node %1!s! into a selector" 0 0 "Design Software" 0 -1 1543265874759 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_SELECTOR" "\"rddata\[5\]\" " "Converted tri-state node \"rddata\[5\]\" into a selector" { } { { "GECKO.bdf" "" { Schematic "F:/kkk/quartus/GECKO.bdf" { { 328 168 376 456 "inst" "" } } } } } 0 13048 "Converted tri-state node %1!s! into a selector" 0 0 "Design Software" 0 -1 1543265874759 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_SELECTOR" "\"rddata\[4\]\" " "Converted tri-state node \"rddata\[4\]\" into a selector" { } { { "GECKO.bdf" "" { Schematic "F:/kkk/quartus/GECKO.bdf" { { 328 168 376 456 "inst" "" } } } } } 0 13048 "Converted tri-state node %1!s! into a selector" 0 0 "Design Software" 0 -1 1543265874759 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_SELECTOR" "\"rddata\[3\]\" " "Converted tri-state node \"rddata\[3\]\" into a selector" { } { { "GECKO.bdf" "" { Schematic "F:/kkk/quartus/GECKO.bdf" { { 328 168 376 456 "inst" "" } } } } } 0 13048 "Converted tri-state node %1!s! into a selector" 0 0 "Design Software" 0 -1 1543265874759 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_SELECTOR" "\"rddata\[2\]\" " "Converted tri-state node \"rddata\[2\]\" into a selector" { } { { "GECKO.bdf" "" { Schematic "F:/kkk/quartus/GECKO.bdf" { { 328 168 376 456 "inst" "" } } } } } 0 13048 "Converted tri-state node %1!s! into a selector" 0 0 "Design Software" 0 -1 1543265874759 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_SELECTOR" "\"rddata\[1\]\" " "Converted tri-state node \"rddata\[1\]\" into a selector" { } { { "GECKO.bdf" "" { Schematic "F:/kkk/quartus/GECKO.bdf" { { 328 168 376 456 "inst" "" } } } } } 0 13048 "Converted tri-state node %1!s! into a selector" 0 0 "Design Software" 0 -1 1543265874759 ""} { "Warning" "WMLS_MLS_CONVERT_TRI_TO_SELECTOR" "\"rddata\[0\]\" " "Converted tri-state node \"rddata\[0\]\" into a selector" { } { { "GECKO.bdf" "" { Schematic "F:/kkk/quartus/GECKO.bdf" { { 328 168 376 456 "inst" "" } } } } } 0 13048 "Converted tri-state node %1!s! into a selector" 0 0 "Design Software" 0 -1 1543265874759 ""} } { } 0 13046 "Tri-state node(s) do not directly drive top-level pin(s)" 0 0 "Analysis & Synthesis" 0 -1 1543265874759 ""}
{ "Info" "IOPT_INFERENCING_SUMMARY" "1 " "Inferred 1 megafunctions from design logic" { { "Info" "IINFER_ALTSYNCRAM_INFERRED" "RAM:RAM_0\|ID_S_B88a4C5_7E3415Ff_e:ram_inst\|Id_S_B889004_7e48Ff67_e_rtl_0 " "Inferred altsyncram megafunction from the following design logic: \"RAM:RAM_0\|ID_S_B88a4C5_7E3415Ff_e:ram_inst\|Id_S_B889004_7e48Ff67_e_rtl_0\" " { { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "OPERATION_MODE SINGLE_PORT " "Parameter OPERATION_MODE set to SINGLE_PORT" { } { } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1543265875071 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WIDTH_A 32 " "Parameter WIDTH_A set to 32" { } { } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1543265875071 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WIDTHAD_A 10 " "Parameter WIDTHAD_A set to 10" { } { } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1543265875071 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "NUMWORDS_A 1024 " "Parameter NUMWORDS_A set to 1024" { } { } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1543265875071 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "OUTDATA_REG_A UNREGISTERED " "Parameter OUTDATA_REG_A set to UNREGISTERED" { } { } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1543265875071 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "ADDRESS_ACLR_A NONE " "Parameter ADDRESS_ACLR_A set to NONE" { } { } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1543265875071 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "OUTDATA_ACLR_A NONE " "Parameter OUTDATA_ACLR_A set to NONE" { } { } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1543265875071 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "INDATA_ACLR_A NONE " "Parameter INDATA_ACLR_A set to NONE" { } { } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1543265875071 ""} { "Info" "ISUTIL_INFERRED_MEGAFUNCTION_PARAMETER" "WRCONTROL_ACLR_A NONE " "Parameter WRCONTROL_ACLR_A set to NONE" { } { } 0 286033 "Parameter %1!s! set to %2!s!" 0 0 "Design Software" 0 -1 1543265875071 ""} } { } 0 276029 "Inferred altsyncram megafunction from the following design logic: \"%1!s!\" " 0 0 "Design Software" 0 -1 1543265875071 ""} } { } 0 19000 "Inferred %1!d! megafunctions from design logic" 0 0 "Analysis & Synthesis" 0 -1 1543265875071 ""}
{ "Info" "ISGN_ELABORATION_HEADER" "RAM:RAM_0\|ID_S_B88a4C5_7E3415Ff_e:ram_inst\|altsyncram:Id_S_B889004_7e48Ff67_e_rtl_0 " "Elaborated megafunction instantiation \"RAM:RAM_0\|ID_S_B88a4C5_7E3415Ff_e:ram_inst\|altsyncram:Id_S_B889004_7e48Ff67_e_rtl_0\"" { } { } 0 12130 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1543265875149 ""}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "RAM:RAM_0\|ID_S_B88a4C5_7E3415Ff_e:ram_inst\|altsyncram:Id_S_B889004_7e48Ff67_e_rtl_0 " "Instantiated megafunction \"RAM:RAM_0\|ID_S_B88a4C5_7E3415Ff_e:ram_inst\|altsyncram:Id_S_B889004_7e48Ff67_e_rtl_0\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "OPERATION_MODE SINGLE_PORT " "Parameter \"OPERATION_MODE\" = \"SINGLE_PORT\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1543265875149 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WIDTH_A 32 " "Parameter \"WIDTH_A\" = \"32\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1543265875149 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WIDTHAD_A 10 " "Parameter \"WIDTHAD_A\" = \"10\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1543265875149 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "NUMWORDS_A 1024 " "Parameter \"NUMWORDS_A\" = \"1024\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1543265875149 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "OUTDATA_REG_A UNREGISTERED " "Parameter \"OUTDATA_REG_A\" = \"UNREGISTERED\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1543265875149 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ADDRESS_ACLR_A NONE " "Parameter \"ADDRESS_ACLR_A\" = \"NONE\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1543265875149 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "OUTDATA_ACLR_A NONE " "Parameter \"OUTDATA_ACLR_A\" = \"NONE\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1543265875149 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "INDATA_ACLR_A NONE " "Parameter \"INDATA_ACLR_A\" = \"NONE\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1543265875149 ""} { "Info" "ISGN_MEGAFN_PARAM_SUB" "WRCONTROL_ACLR_A NONE " "Parameter \"WRCONTROL_ACLR_A\" = \"NONE\"" { } { } 0 12134 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "Design Software" 0 -1 1543265875149 ""} } { } 0 12133 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "Analysis & Synthesis" 0 -1 1543265875149 ""}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/altsyncram_vh41.tdf 1 1 " "Found 1 design units, including 1 entities, in source file db/altsyncram_vh41.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram_vh41 " "Found entity 1: altsyncram_vh41" { } { { "db/altsyncram_vh41.tdf" "" { Text "F:/kkk/quartus/db/altsyncram_vh41.tdf" 27 1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1543265875259 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1543265875259 ""}
{ "Info" "IMLS_MLS_PRESET_POWER_UP" "" "Registers with preset signals will power-up high" { } { { "../vhdl/LEDs.vhd" "" { Text "F:/kkk/vhdl/LEDs.vhd" 90 -1 0 } } { "../vhdl/buttons.vhd" "" { Text "F:/kkk/vhdl/buttons.vhd" 37 -1 0 } } } 0 13000 "Registers with preset signals will power-up high" 0 0 "Analysis & Synthesis" 0 -1 1543265875852 ""}
{ "Info" "IMLS_MLS_DEV_CLRN_SETS_REGISTERS" "" "DEV_CLRn pin will set, and not reset, register with preset signal due to NOT Gate Push-Back" { } { } 0 13003 "DEV_CLRn pin will set, and not reset, register with preset signal due to NOT Gate Push-Back" 0 0 "Analysis & Synthesis" 0 -1 1543265875852 ""}
{ "Info" "ISUTIL_TIMING_DRIVEN_SYNTHESIS_RUNNING_ON_PARTITION" "Top " "Timing-Driven Synthesis is running on partition \"Top\"" { } { } 0 286031 "Timing-Driven Synthesis is running on partition \"%1!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1543265876040 ""}
{ "Info" "IBPM_HARD_BLOCK_PARTITION_CREATED" "hard_block:auto_generated_inst " "Generating hard_block partition \"hard_block:auto_generated_inst\"" { { "Info" "IBPM_HARD_BLOCK_PARTITION_NODE" "0 0 0 0 0 " "Adding 0 node(s), including 0 DDIO, 0 PLL, 0 transceiver and 0 LCELL" { } { } 0 16011 "Adding %1!d! node(s), including %2!d! DDIO, %3!d! PLL, %4!d! transceiver and %5!d! LCELL" 0 0 "Design Software" 0 -1 1543265877618 ""} } { } 0 16010 "Generating hard_block partition \"%1!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1543265877618 ""}
{ "Info" "ICUT_CUT_TM_SUMMARY" "3876 " "Implemented 3876 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "7 " "Implemented 7 input pins" { } { } 0 21058 "Implemented %1!d! input pins" 0 0 "Design Software" 0 -1 1543265878008 ""} { "Info" "ICUT_CUT_TM_OPINS" "128 " "Implemented 128 output pins" { } { } 0 21059 "Implemented %1!d! output pins" 0 0 "Design Software" 0 -1 1543265878008 ""} { "Info" "ICUT_CUT_TM_LCELLS" "3677 " "Implemented 3677 logic cells" { } { } 0 21061 "Implemented %1!d! logic cells" 0 0 "Design Software" 0 -1 1543265878008 ""} { "Info" "ICUT_CUT_TM_RAMS" "64 " "Implemented 64 RAM segments" { } { } 0 21064 "Implemented %1!d! RAM segments" 0 0 "Design Software" 0 -1 1543265878008 ""} } { } 0 21057 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "Analysis & Synthesis" 0 -1 1543265878008 ""}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 35 s Quartus Prime " "Quartus Prime Analysis & Synthesis was successful. 0 errors, 35 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "4846 " "Peak virtual memory: 4846 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1543265878118 ""} { "Info" "IQEXE_END_BANNER_TIME" "Mon Nov 26 21:57:58 2018 " "Processing ended: Mon Nov 26 21:57:58 2018" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1543265878118 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:21 " "Elapsed time: 00:00:21" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1543265878118 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:30 " "Total CPU time (on all processors): 00:00:30" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1543265878118 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Analysis & Synthesis" 0 -1 1543265878118 ""}