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+----------------------------------------------------------------------------+
; Quartus Prime QXP Design File                                              ;
+------------------+---------------------------------------------------------+
; Field            ; Value                                                   ;
+------------------+---------------------------------------------------------+
; Entity           ; CPU                                                     ;
; Case Sensitive   ;                                                         ;
; QXP Source       ; CPU-inst.qxp                                            ;
; Software Version ; Version 16.0.0 Build 211 04/27/2016 SJ Standard Edition ;
; Date             ; Mon Oct 16 16:25:59 2017                                ;
; Contents         ; Netlist Only                                            ;
; Family           ; EP4CE30F23C8                                            ;
; Device           ; CYCLONEIVE3_V1F484C8                                    ;
+------------------+---------------------------------------------------------+

+------------------------------------------------------------+
; Boundary Ports                                             ;
+----------------+--------+----------------------------------+
; Port Name      ; Type   ; Default Value                    ;
+----------------+--------+----------------------------------+
; write          ; output ; X                                ;
; clk            ; input  ; 1                                ;
; reset_n        ; input  ; 1                                ;
; rddata [31:0]  ; input  ; 11111111111111111111111111111111 ;
; read           ; output ; X                                ;
; address [15:0] ; output ; XXXXXXXXXXXXXXXX                 ;
; wrdata [31:0]  ; output ; XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX ;
+----------------+--------+----------------------------------+