# 1 2 3 4 5 6 # reset_n:OP:OPX:state:op_alu_mask:op_alu -=Controller test:====================================================== 0 00 00 0 000000 000000 --R_OP test:------------------------------------------------------------ #--rol 1 00 00 0 000000 000000 1 00 00 1 000000 000000 1 3A 03 2 000000 000000 1 3A 03 3 110111 110000 #--nor 1 00 00 1 000000 000000 1 3A 06 2 000000 000000 1 3A 06 3 110011 100000 #--cmple 1 00 00 1 000000 000000 1 3A 08 2 000000 000000 1 3A 08 3 111111 011001 #--ror 1 00 00 1 000000 000000 1 3A 0B 2 000000 000000 1 3A 0B 3 110111 110001 #--and 1 00 00 1 000000 000000 1 3A 0E 2 000000 000000 1 3A 0E 3 110011 100001 #--cmpgt 1 00 00 1 000000 000000 1 3A 10 2 000000 000000 1 3A 10 3 111111 011010 #--sll 1 00 00 1 000000 000000 1 3A 13 2 000000 000000 1 3A 13 3 110111 110010 #--or 1 00 00 1 000000 000000 1 3A 16 2 000000 000000 1 3A 16 3 110011 100010 #--cmpne 1 00 00 1 000000 000000 1 3A 18 2 000000 000000 1 3A 18 3 111111 011011 #--srl 1 00 00 1 000000 000000 1 3A 1B 2 000000 000000 1 3A 1B 3 110111 110011 #--xnor 1 00 00 1 000000 000000 1 3A 1E 2 000000 000000 1 3A 1E 3 110011 100011 #--cmpeq 1 00 00 1 000000 000000 1 3A 20 2 000000 000000 1 3A 20 3 111111 011100 #--cmpleu 1 00 00 1 000000 000000 1 3A 28 2 000000 000000 1 3A 28 3 111111 011101 #--cmpgtu 1 00 00 1 000000 000000 1 3A 30 2 000000 000000 1 3A 30 3 111111 011110 #--add 1 00 00 1 000000 000000 1 3A 31 2 000000 000000 1 3A 31 3 111000 000000 #--sub 1 00 00 1 000000 000000 1 3A 39 2 000000 000000 1 3A 39 3 111000 001000 #--sra 1 00 00 1 000000 000000 1 3A 3B 2 000000 000000 1 3A 3B 3 110111 110111 --RI_OP test:----------------------------------------------------------- #--roli 1 00 00 1 000000 000000 1 3A 02 2 000000 000000 1 3A 02 4 110111 110000 #--slli 1 00 00 1 000000 000000 1 3A 12 2 000000 000000 1 3A 12 4 110111 110010 #--srli 1 00 00 1 000000 000000 1 3A 1A 2 000000 000000 1 3A 1A 4 110111 110011 #--srai 1 00 00 1 000000 000000 1 3A 3A 2 000000 000000 1 3A 3A 4 110111 110111 --I_OP test:------------------------------------------------------------ #--addi 1 00 00 1 000000 000000 1 04 00 2 000000 000000 1 04 00 5 111000 000000 #--cmplei 1 00 00 1 000000 000000 1 08 00 2 000000 000000 1 08 00 5 111111 011001 #--cmpgti 1 00 00 1 000000 000000 1 10 00 2 000000 000000 1 10 00 5 111111 011010 #--cmpnei 1 00 00 1 000000 000000 1 18 00 2 000000 000000 1 18 00 5 111111 011011 #--cmpeqi 1 00 00 1 000000 000000 1 20 00 2 000000 000000 1 20 00 5 111111 011100 --UI_OP test:----------------------------------------------------------- #--andi 1 00 00 1 000000 000000 1 0C 00 2 000000 000000 1 0C 00 6 110011 100001 #--ori 1 00 00 1 000000 000000 1 14 00 2 000000 000000 1 14 00 6 110011 100010 #--xnori 1 00 00 1 000000 000000 1 1C 00 2 000000 000000 1 1C 00 6 110011 100011 #--cmpleui 1 00 00 1 000000 000000 1 28 00 2 000000 000000 1 28 00 6 111111 011101 #--cmpgtui 1 00 00 1 000000 000000 1 30 00 2 000000 000000 1 30 00 6 111111 011110 --LOAD test:------------------------------------------------------------ #--ldw 1 00 00 1 000000 000000 1 17 00 2 000000 000000 1 17 00 7 111000 000000 1 17 00 8 000000 000000 --STORE test:----------------------------------------------------------- #--stw 1 00 00 1 000000 000000 1 15 00 2 000000 000000 1 15 00 9 111000 000000 --BRANCH test:---------------------------------------------------------- #--br 1 00 00 1 000000 000000 1 06 00 2 000000 000000 1 06 00 10 000000 000000 #--ble 1 00 00 0 000000 000000 1 00 00 1 000000 000000 1 0E 00 2 000000 000000 1 0E 00 10 111111 011001 #--bgt 1 00 00 0 000000 000000 1 00 00 1 000000 000000 1 16 00 2 000000 000000 1 16 00 10 111111 011010 #--bne 1 00 00 0 000000 000000 1 00 00 1 000000 000000 1 1E 00 2 000000 000000 1 1E 00 10 111111 011011 #--beq 1 00 00 0 000000 000000 1 00 00 1 000000 000000 1 26 00 2 000000 000000 1 26 00 10 111111 011100 #--bleu 1 00 00 0 000000 000000 1 00 00 1 000000 000000 1 2E 00 2 000000 000000 1 2E 00 10 111111 011101 #--bgtu 1 00 00 0 000000 000000 1 00 00 1 000000 000000 1 36 00 2 000000 000000 1 36 00 10 111111 011110 --CALL test:------------------------------------------------------------ #--call 1 00 00 0 000000 000000 1 00 00 1 000000 000000 1 00 00 2 000000 000000 1 00 00 11 000000 000000 --CALLR test:----------------------------------------------------------- #--callr 1 00 00 0 000000 000000 1 00 00 1 000000 000000 1 3A 1D 2 000000 000000 1 3A 1D 12 000000 000000 --JMP test:------------------------------------------------------------- #--ret 1 00 00 0 000000 000000 1 00 00 1 000000 000000 1 3A 05 2 000000 000000 1 3A 05 13 000000 000000 #--jmp 1 00 00 0 000000 000000 1 00 00 1 000000 000000 1 3A 0D 2 000000 000000 1 3A 0D 13 000000 000000 --JMPI test:-------------------------------------------------- #--jmpi 1 00 00 0 000000 000000 1 00 00 1 000000 000000 1 01 00 2 000000 000000 1 01 00 15 000000 000000 #--(optional)HI_OP test:------------------------------------------------- ##--andhi # 1 00 00 0 000000 000000 # 1 00 00 1 000000 000000 # 1 2C 00 2 000000 000000 # 1 2C 00 16 110011 100001 ##--orhi # 1 00 00 1 000000 000000 # 1 34 00 2 000000 000000 # 1 34 00 16 110011 100010 ##--xnorhi # 1 00 00 1 000000 000000 # 1 3C 00 2 000000 000000 # 1 3C 00 16 110011 100011 --BREAK test:----------------------------------------------------------- #--break 1 00 00 1 000000 000000 1 3A 34 2 000000 000000 1 00 00 14 000000 000000 1 00 00 14 000000 000000 1 00 00 14 000000 000000 1 00 00 14 000000 000000 1 00 00 14 000000 000000 1 00 00 14 000000 000000